AN93
Rev. 1.4
11
2. Modem (System-Side) Device
The Si24xx ISOmodem system-side devices contain a controller, a DSP, program memory (ROM), data memory
(RAM), UART, SPI and parallel interfaces, a crystal oscillator, and an isolation capacitor interface. The following
sections describe the reset sequence, the host interface, the isolation interface, low-power modes, SSI/voice mode
and the EEPROM interface.
2.1. Resetting the Device
Reset is required after power-on or brownout conditions (the supply dropping to less than the data sheet minimum).
The supply must be stable throughout the minimum required reset time described here and thereafter. A reset is
also required in order to come out of the power down mode.
Some operational choices, including the crystal oscillator frequency used and the command interface used (e.g.
UART vs SPI), is made during the reset time according to pull-down resistors placed on some modem pins. These
pins are modem output lines, but, during reset, the modem places them into a high-impedance mode with weak
internal pull-ups, then reads the user's strapping choices. It is important that the resultant state changes of these
pins during reset are not misinterpreted by the host.
For example the INT output pin of the modem (and perhaps others) can be strapped low with a 10 k
resistor to
request SPI operation. If that mode is chosen, the host should take care not to enable this interrupt input before the
modem reset since the INT signal will transition from high to low and back up during reset in this case and can
generate an unexpected interrupt.
If an external clock signal is provided instead of a crystal attached to the modem, it is important that this external
clock signal be stable before the reset ends.
2.1.1. Reset Sequence
After power-on, the modem must be reset by asserting the RESET pin (low) for the required time then waiting a
fixed 300 ms before sending the first AT command. The reset recovery time of 300 ms is also applicable if the reset
is a SW triggered event, such as an ATZ command.
If a 4.9152 MHz crystal or an external 27 MHz clock is used, the reset must be asserted for 5 ms, and a wait of
300 ms duration must happen before an AT command is issued. If a 32 kHz crystal is used, the reset pulse must be
500 ms long and followed by the same 300 ms duration wait as that used for higher frequency clocks.
This is adequate to reset all the on-chip registers. Note that 16 µs after the customer-applied reset pulse starts, the
I/O pins will be tri-stated with a weak pull-up, and, 16 µs after the end of this reset pulse, the IO pins will switch to
inputs or outputs as appropriate to the mode indicated by the pull-down strapping. This 16 µs delay is for newer
revs of the modem parts (those parts that introduce a 32 kHz crystal and SPI operation); older revs exhibit a delay
of only nanoseconds.
The reset sequence described above is appropriate for all user modes of the modem including UART, SPI, and
Parallel bus operation.
A software reset of the modem can also be performed by issuing the command ATZ or by setting U-register 6E bit
4 (RST) high using AT commands. After issuing a software or hardware reset, the host must wait for the reset
recovery time before issuing any subsequent AT commands.
There is no non-volatile memory on the ISOmodem other than program ROM. When reset, the ISOmodem reverts
to the original factory default settings. Any set-up or configuration data and software updates must be reloaded
after every reset. This is true whether the reset occurs due to a power-down/power-up cycle, a power-on reset
through a manual reset switch, by writing U6E [4] (RST) = 1, or by executing ATZ.
A suggested reset sequence is as follows:
1. Apply an active-low pulse to the RESET pin; write RST bit or ATZ<CR>.
2. Wait at least the reset recovery time.
3. Load firmware updates (if required).
4. Set non-default DAA interface parameters—DCV, ACT, ILIM, OHS2, OHS, RZ, RT, (U67), LIM, (U68).
5. Set non-default cadence values—Busy Tone, Ringback, Ring.
Содержание Si2404
Страница 2: ...AN93 2 Rev 1 4 ...
Страница 27: ...AN93 Rev 1 4 27 Figure 7 Parallel Interface Read Timing Figure 8 Parallel Interface Write Timing ...
Страница 200: ...AN93 200 Rev 1 4 Figure 31 TAM Handset and Speakerphone Voice Paths ...
Страница 201: ...AN93 Rev 1 4 201 Figure 32 Si3000 Codec Gain and Signal Selection Options ...
Страница 290: ...AN93 290 Rev 1 4 Figure 57 256 Band Spectral Display Figure 58 2048 Band Spectral Display ...
Страница 305: ...AN93 Rev 1 4 305 Figure 76 Parallel or SPI Port Interrupt Service Flowchart ...