A N 9 3
118
Rev. 1.4
U68 is a bit-mapped register with bits 15:3 reserved. Reading these bits returns zero. Bits 4 and 2:0 are all read/
write (see Table 79).
Bit 2 (BTE) = 0 (default) is disabled by default. When BTE = 1, the DAA automatically responds to a collapse of the
line-derived power supply during a billing tone event. When off-hook, if BTE = 1 and BTD goes high, the dc
termination is increased to 800
to reduce loop current. If BTE and U70 [9] (RIM) are set to 1, an interrupt from
U70 [1] (RI) also occurs when BTD goes to 1 (high).
Bit 1 (ROV) is normally 0 and is set to 1 to report an excessive receive input level. ROV is cleared by writing it to 0.
Bit 0 (BTD) = 0 normally but is set to 1 if a billing tone is detected. BTD is cleared by writing a 0 to BTD.
U68 resets to 0x0000 with a power-on or manual reset.
U6A is a bit-mapped register with bits 15:3 and 1:0 reserved. Reading these bits returns zero. Bit 2 is read-only
(See Table 80).
Bit 2 (OVL) is a read-only bit that detects a receive overload. This bit is similar to U68 [1] (ROV) except OVL clears
itself after the overload condition is removed.
0
RT
Ringer Threshold Select.
Used to satisfy country requirements on ring detection. Signals below the lower level do not
generate a ring detection; signals above the upper level are guaranteed to generate a ring
detection.
0 = 11 to 22 V
rms
.
1 = 17 to 33 V
rms
.
Table 79. U68 Bit Map*
Bit
Name
Function
15:8
Reserved
Read returns zero.
7:3
Reserved
Do not modify.
2
BTE
Billing Tone Protect Enable.
0
=
Disabled.
1
=
Enabled.
1
ROV
Receive Overload.
0
=
Normal receive input level.
1
=
Excessive receive input level.
0
BTD
Billing Tone Detected.
0
=
No billing tone.
1
=
Billing tone detected (cleared by writing 0).
Table 78. U67 Bit Map* (Continued)
Bit
Name
Function
Содержание Si2404
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Страница 290: ...AN93 290 Rev 1 4 Figure 57 256 Band Spectral Display Figure 58 2048 Band Spectral Display ...
Страница 305: ...AN93 Rev 1 4 305 Figure 76 Parallel or SPI Port Interrupt Service Flowchart ...