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UP-5900VS
CIRCUIT DESCRIPTION
5 – 38
16. ULTRA I/O
National semiconductor’s PC87309 is used.
16-1. PIN ASSIGNMENT
16-2. PIN DISCRIPTION
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
1 2 3 4 5 6 7 8 9 101 11 21 31 41 51 61 71 81 92 02 12 22 32 42 52 62 72 82 93 0
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
DIR
WDATA
DR1/DENSEL
DR0
MTR1/P12
MTR0/DRATE0
IRTX/DENSEL
IRRX1/P12/DRATE0
DACK3
VDD
VSS
DACK2
DACK1
DRQ3
DRQ2
DRQ1
MR
IRQ12
IRQ7
PD6
PD7
CTS1
DCD1
DSR1
BOUT1/DTR1/BADDR0
RI1
RTS1/BADDR1
SIN1
VDD
VSS
SOUT1/CGF0
CTS2/A11
DCD2/P12
DSR2/DRATE0
BOUT2/DTR2/IRSL2/ID2
RI2/DENSEL
RTS2/IRSL1/ID1
SIN2/ID3
SOUT2/IRSL0/IRRX2/ID0
PD5
PD4
PD3
PD2
PD0
AFD/
DSTRB
SLIN/
ASTRB
INIT
ERR
PE
SLCT
A
CK
STB/
WRITE
B
USY/
W
AIT
VSS
P21
P20
MD
A
T
MCLK
KBCLK
INDEX
TRK0
WGA
TE
HDSEL
STEP
PD1
D0
D1
D2
D5
D6
D7
A0
A1
A2
A3
A4
A5
VSS
A6
A7
A8
A9
A10
AEN
IOCHRD
Y
IORD
IOWR
TC
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
PC87309VLJ
RD
A
T
A
D4
D3
CLKIN
KBD
A
T
DSKCHG
WP
Signal/Pin
Name
Pin Number
Module
I/O and
Group #
Function
A11-0
93, 20-16,
14-9
ISA-Bus
Input
Group 1
ISA-Bus Address – A11-0 are used for address decoding on any access except DMA
accesses, on the condition that the AEN signal is low.
A11 is multiplexed with CTS2 on pin 93 and available in Full-IR mode only. Since A11
is required to support full ISA PnP mode (for decoding A79h), this mode is not available
in Two-UART mode.
ACK
68
Parallel Port
Input
Group 3
Acknowledge – This input signal is pulsed low by the printer to indicate that it has
received data from the parallel port. This pin is internally connected to an internal weak
pull-up.
AFD
74
Parallel Port
I/O
Group 8
Automatic Feed – When this signal is low the printer should automatically feed a line
after printing each line. This pin is in TRISTATE after a 0 is loaded into the correspond-
ing control register bit.
An external 4.7 K
Ω
pull-up resistor should be attached to this pin.
This signal is multiplexed with DSTRB.
AEN
21
ISA-Bus
Input
Group 1
DMA Address Enable – This input signal disables function selection via A11-0 when it
is high. Access during DMA transfer is not affected by this signal. This pin is used for
external decoding of A11-15 in Two-UART mode or A15-12 in Full-IR mode.
ASTRB
73
Parallel Port
Output
Group 8
Address Strobe (EPP) – This signal is used in EPP mode as an address strobe. It is
active low.
This signal is multiplexed with SLIN.
BADDR1,0
88,86
Configuration
Input
Group 4
Base Address Strap Pins 0 and 1 – These pins determine the base addresses of the
Index and Data registers, the value of the Plug and Play ISA Serial Identifier and the
configuration state immediately after reset. These pins are pulled down by internal 30
K
Ω
resistors.
External 10 KW pull-up resistors to VDD should be employed.
BADDR1 is multiplexed with RTS1.
BADDR0 is multiplexed with DTR1 and BOUT1.
BOUT2,1
96,86
UART1,
UART2
Output
Group 12
Baud Output – This multi-function pin provides the associated serial channel Baud
Rate generator output signal if test mode is selected, i.e., bit 7 of the EXCR1 register is
set. After Master Reset this pin provides the DTR function.
BOUT2 is multiplexed with DTR2, IRSL2 and ID2.
BOUT1 is multiplexed with DRT1 and BADDR0.
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