(5) Developing bias voltage correction
a. Outline and purpose
Deterioration of developer due to changes in the environmental conditions.
To solve the above problem, the developing bias voltage is changed according to the situation to maintain the proper density print and prevent
against background copy.
(Operation)
1) Three toner image patches are made on the OPC drum with the three voltages Vdbc and Vdbc
±
(n)a. (a = 50V)
2) Connect the three points of three toner patch density points with strait lines, and check that it reaches the reference density.
If the above condition is satisfied, obtain the correction developing bias voltage (Vdbc(n)) for the reference density by linear approximation.
The reference density: 38 (set with SIM 44-4) for AR-280/285/335/405/407
58 (set with SIM 44-15) for AR-250/281/286/287/336/337
36 (set with SIM 44-4) for AR-501/505/507
3) Calculate the developing bias correction voltage (
v
Vdbc(n)).
The developing bias correction voltage (
v
Vdbc(n)) is applied to the developing bias voltage correction in all the operation modes.
If the condition of 2) is not satisfied, change the condition of 1) as follows and make three toner image patches similarly to 1).
(Contents of change)
Change the three developing bias voltages of correction for making toner image patches to Vdbc + (n
±
1)
a
, Vdbc + (n
±
2)
a
, and Vdbc + (n
±
3)
a
, and execute 1) and 2). (
a
= 50V)
Repeat the above operation until the condition of 2) is satisfied. (n = Number of toner patch forming. 3 toner image patches are made at once.)
The correction operation of the developing bias voltage should be in the range of 0
~
–750V.
DEVELOPING BIAS VO LTA GE CORRECTION
Develping bias voltage
Reference level
(Set by T.C 44-4)
Limit(-750v)
800
Vdbc
Vdbc + (n)
α
Vdbc - (n)
α
Vdbc + (n+1)
α
Vdbc + (n+2)
α
Vdbc + (n+3)
α
60
Lower
50
40
38
Image patch density
30
20
10
Higher
0
100
200
300
400
500
600
700
∆
Vdbc(n)
α
= 50
PT2/BS2(1D1)2
PT3/BS3(1D2)3
PT2/BS2(1D1)2
PT3/BS3(1D1)3
∆
Vdbc(n)
CASE 1
CASE 2
Vdbc(n)
Vdbc(n)
PT2/BS2(1D2)2
PT1/BS1(1D2)1
PT3/BS3(1D1)3
PT1/BS1(1D1)1
PT1/BS1(1D1)1
DEVELOPING BIAS VO LTA GE CORRECTION
Develping bias voltage
60
Lower
50
40
38
Image patch density
30
20
10
Higher
0
100
200
300
400
500
600
700
∆
Vdbc(n)
PT1/BS1(1D1)1
PT3/BS3(1D1)3
PT1/BS1(1D1)1
PT2/BS2(1D1)2
PT3/BS3(1D1)3
∆
Vdbc(n+1)
FIRST
SECOND
Vdbc(n)
Vdbc(n+1)
α
= 50
Vdbc
Vdbc + (n)
α
Vdbc - (n)
α
Vdbc(n) - (n)
α
Vdbc(n)
Vdbc(n) + (n)
α
800
Reference level
(Set by T.C 44-4)
PT2/BS2(1D1)2
Limit(-750v)
10 – 3
7/13/2000
Содержание AR-250
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