AR-168N/168L CIRCUIT DIAGRAM 14 - 3
A
A
B
B
C
C
4
3
2
1
(14-D3)
(1-D2),(14-D3)
(14-A3)
(14-A4)
(14-D3)
(14-A2)
(14-A2)
(14-D3)
(14-D3)
(14-A2)
(14-A2)
(14-A2)
(14-A2)
(5-B1)
(5-B1)
(6-B3)
(6-B3)
(6-B3)
(6-B3)
(6-B3)
(6-B3)
(5-B1)
(3-E2)
(3-E3)
(3-D2)
(3-D2)
(3-D2)
(3-D2)
(3-D2)
(3-D2)
(3-D2)
(3-E1)
(3-E2)
(3-E2)
(1-D2)
(1-C1)
(5-B1)
(1-A2)
(4-C3
)
(1-D2
)
(1-D2
)
(1-B
3)
(1-B
3)
(1-B
1)
(5
B
1)
(3-A1)
(4-A2)
(13-C2)
(3-A3)
(3-A
2)
(13-B
2)
(8-A
1)
(4-C1
)
(1-B
1)
(9-B
2)
(3-B
2)
MCU PWB (ASIC section)
RAMDB0
RAMDB1
RAMDB2
RAMDB3
RAMDB4
RAMDB5
RAMDB6
RAMDB7
RAMDB15
RAMDB14
RAMDB13
RAMDB12
RAMDB11
RAMDB10
RAMDB9
RAMDB8
SFCLK48
PFCLKIN
PFCLKOUT
MM_BI2
MM_AI0
MM_BI1
MM_AI2
MM_BI0
MM_AI1
/INREQ
/OUTACK
/FAXPRO
/PCLPRO
/OUTCS
A8
D9
/OU
TCS
/PCLP
RO
MM_BI2
RAMDB13
D7
RAM_CL
K_OUT
AFE_SDI
D4
D2
MEM_
INT
MM_AI0
RAMDB14
D8
PFC
LKIN
/FA
XPRO
D15
PFCL
KOUT
D3
D0
A7 A6
A5
CL
KSW
RAMDB9
/IN
REQ
MM_BI1
MM_BI0
MM_AI2
MM_AI1
D1
D13
D5
JTG_
TDI
D12
D11
RAMDB12
A4
A2 A1
/OU
TACK
A9
A3
RAMDB1
D6
SFCL
K48
RAMDB15
D10
PFC
LK
SYNC
#
D14
JTG
_TDO
RAMDB2
/ES
PRD
RAMDB7
RAMDB6
RAMDB5
RAMDB4
RAMDB3
RAMDB0
RAMDB11
RAMDB10
RAMDB8
AFE_DB2
AFE_DB7
AFE_DB0
AFE_DB6
AFE_DB3
AFE_DB4
AFE_DB1
AFE_DB5
AFE_DB7
AFE_DB6
AFE_DB5
AFE_DB4
AFE_DB3
AFE_DB2
AFE_DB1
AFE_DB0
AFE_SDI
JTG
_TMS
JTG_TCK
JTG_TDI
JTG_TMS
JTG_TCK
JTG_TDO
MAD11
MAD8
MAD4
MAD1
MAD2
MAD5
MAD6
MAD9
MAD3
MAD0
MAD7
MAD12
MAD10
RAM_CLK_OUT
AFE_SEN
ADCLK
CCD_CP
CCD_PHI1
CCD_PHI2
CCD_TG
AFE_DB[7..0]
CL
CCD_RS
VSAMP
AFE_SCK
AFE_SDI
BSAMP
MM_Y1
MM_PH_A
MM_AI0
MM_AI1
MM_PH_B
MM_BI0
MM_BI1
MM_Y2
MM_Y3
BANK1
BANK0
/SDCAS
/SDRAS
/SDCS
DQM0
MAD[12..0]
/SDWDE
SDCKE
DQM1
SDCLK
D[15..0]
A[19..0]
/CS2
MIRCN
T
CPU_S
YNC
/LWR /RD
RAMDB[15..0]
ARB_I
NT
MMD
(/ASI
C_RST)
/LEND
VIDEO#
/RESET0
VCC3
VCC3
VCC3
VCC3
C397
0.1u
R351
33J
C69
12p
IC5
HG73C138HFV
ASIC
1 2
3 4
8
6 7
5
9
10 11 12
13 14 15
16 17 18 19
20 21 22
23 24 25
26 27 28 29
30 31 32
34 35
36 37 38 39
40 41 42
43 44 45
46 47 48 49
192 191
190 189 188
187 186 185 184
183 182 181
180 179 178
177 176 175 174
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
217
231
230
225
221
226
220 219
223
218
216 215
229
228
227
224
222
214
213 212 211
210 209 208
207 206 205 204
203 202 201
200 199 198
197
195
196
193
194
33
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
CPU_DATA7 CPU_DATA6
CPU_DATA5 CPU_DATA4
CPU_DATA1
CPU_DATA3 CPU_DATA2
VCC(AC)
CPU_DATA0
GND(AC) MIRCNT /CPUSYNC
MEM_INT ARB_INT VCC(CORE)
CPU_AD8 CPU_AD7 CPU_AD6 CPU_AD5
GND(CORE) RAM_CLK_IN CPU_AD4
CPU_AD3 CPU_AD2 CPU_AD1
CPU_AD0 /CPUCS SFCLK48 GND(CORE)
/CPUWR /CPURD /RESET
PFCLK CLKSW
GND(CORE) PFCLKOUT PFCLKIN GND(PLL)
VCC(PLL) GND(PLL) VCC(PLL)
TM2_15M /SYNC GND(AC)
/VIDEO /LEND VCC(AC)
VCC(CORE)
/INREQ
/OUTCS
/OUTACK
/ESPRD
/FAXPRD /PCLPRD GND(AC) MDAT15
MDAT14 MDAT13
VCC(CORE)
MDAT12 MDAT11 MDAT10
VCC(AC) MDAT09 MDAT08
RAM_DATA4
RAM_DATA5
RAM_DATA6
RAM_DATA7
GND(AC)
RAM_DQM0
RAM_WDE
VCC(AC)
RAM_CAS
RAM_RAS
RAM_CS
RAM_BANKS0
RAM_BANKS1
VCC(CORE)
RAM_MAD10
RAM_MAD0
RAM_MAD1
GND(CORE)
RAM_MAD2
RAM_MAD3
GND(AC)
MM_AI2
MM_AI1
MM_AI0
MM_PH_A
AFE_DB3
MM_BI2
MM_BI1
MM_Y2
VCC(AC)
MM_Y1
AFE_DB0 AFE_DB1
GND(CORE)
AFE_DB2
AFE_DB4 AFE_DB5
MM_BI0
MM_PH_B
VCC(CORE)
MM_Y3
CLPWM
AFE_DB6
AFE_DB7 GND(AC) AFESCK
VCC(CORE)
ADCLK
GND(CORE)
AFE_SEN CCD_PH1 CCD_PH2 AFE_SDI
CCD_CP BSAMP CCD_RS
CCD_TG VSAMP
GND(CORE)
TD0
TRSK
TDI
TCK
TMS
VCC(CORE)
GND(CORE)
RAM_DATA3
RAM_DATA2
RAM_DATA1
RAM_DATA0
GND(AC)
RAM_DATA15
RAM_DATA14
VCC(CORE)
RAM_DATA13
RAM_DATA12
RAM_DATA11
RAM_DATA10
RAM_DATA9
RAM_DATA8
VCC(CORE)
RAM_DQM1
RAM_CKE
GND(AC)
RAM_CLK_OUT
GND(CORE)
RAM_MAD12
RAM_MAD11
RAM_MAD9
VCC(CORE)
RAM_MAD8
RAM_MAD7
VCC(AC)
RAM_MAD6
RAM_MAD5
RAM_MAD4
GND(AC)
CPUDATA15
CPUDATA14
CPUDATA13
CPUDATA12
CPUDATA11
CPUDATA10
CPUDATA9
CPUDATA8
C67
0.1u
BR60
82J
1
2
3
4
8
7
6
5
BR9
1
2
3
4
R45
0J
R24
33J
BR43
33J
1
2
3
4
8
7
6
5
L3
ZJSR5101-223
BR48
10kJ
1
2
3
4
8
7
6
5
BR2
1
2
3
4
BR27
33J
1
2
3
4
8
7
6
5
BR30
33J
1
2
3
4
8
7
6
5
C70
12p
R23
33J
BR61
10kJ
1
2
3
4
8
7
6
5
C47
47p
R34
10kJ
X2
OSC-31
48MHz
1
8
5
4
N.C.
VCC
OUTPUT
GND
R25
33J
R32
10kJ
BR29
10kJ
1
2
3
4
8
7
6
5
BR39
33J
1
2
3
4
8
7
6
5
C49
47p
BR31
10kJ
1
2
3
4
8
7
6
5
BR57
10kJ
1
2
3
4
8
7
6
5
R27
33J
C68
12p
C51
47p
BR53
10kJ
1
2
3
4
8
7
6
5
BR62
33J
1
2
3
4
8
7
6
5
R26
33J
BR63
33J
1
2
3
4
8
7
6
5
C50
47p
R29
33J
C52
47p
C48
47p
C66
2200
0p
R30
33J
BR41
33J
1
2
3
4
8
7
6
5
C53
47p
BR45
33J
1
2
3
4
8
7
6
5
BR33
10kJ
1
2
3
4
8
7
6
5
R31
33J
X3
HC-49U/S (16.1511MHz)
BR49
33J
1
2
3
4
8
7
6
5
C54
47p
BR52
33J
1
2
3
4
8
7
6
5
R44
0J
R43
33J
BR56
33J
1
2
3
4
8
7
6
5
R33
10kJ
14̲CIRCUTDIAGRAM.fm 3 ページ 2005年11月18日 金曜日 午後7時14分