Synchronism Checking
The synchronism-checking element (25) monitors the phasor difference voltage between
voltage applied to the VS input and the polarizing voltage selected via the SYNCP setting,
from either VA, VB, or VC inputs. The element asserts when the magnitude of the differ-
ence voltage is less than the 25DV voltage setting.
The synchronism checking timer (25T) begins timing when four conditions are met:
1.
The breaker appears open, as judged by an deasserted 52A input and dropped out 50NG
overcurrent element.
2.
The 25 element asserts indicating that the phasor difference voltage across the selected
pole of the circuit breaker is less than the 25DV setting. When 25 asserts, the polarizing
and synchronizing sides of the system are within the synchronizing voltage range.
3.
The
59P
element indicates that the polarizing voltage is present and normal. The 59P
element operates on positive-sequence voltage applied to VA, VB, and VC.
4.
The
59S
element indicates that the monitored phase of the synchronizing voltage is
present and normal.
When the timer expires at the end of its 25T setting, the
SSC
bit in the Relay Word is set. It
remains set until any one of the four conditions listed above is violated.
Section 5: APPLICATIONS provides a discussion of the applications and setting selections
for this logic.
Voltage Checking (VSC)
Four voltage elements monitor high/low voltage conditions on both sides of the circuit
breaker:
Undervoltage elements:
27P, 27S
Overvoltage elements:
59P, 59S
The
27P
and
59P
elements monitor the polarizing positive-sequence voltage magnitude
determined from VA, VB, and VC inputs. The
27S
and
59S
elements monitor the phase-to-
neutral voltage magnitude presented to the VS input. All four voltage elements are in the
Relay Word. They are processed by polarizing/synchronizing voltage logic, which is
selectable by the PSVC Polarizing/Synchronizing Voltage Check setting, to select voltage
conditions as follows:
PSVC Setting
Voltage Relationship
VSC Logic Condition
N
Disable voltage checking scheme
0 (FALSE)
S
Live Sync/Dead Pol (LSDP) condition
59S * 27P
P
Live Pol/Dead Sync (LPDS) condition
59P * 27S
E
Either LSDP or LPDS
59S * 27P + 59P * 27S
Date Code 950712
Specifications
SEL-221F, -1 Instruction Manual
2-25
Содержание SEL-221F
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Страница 229: ...SEL 200 Series Relay Main Board Troubleshooting Test Points and Jumper Locations ...