IDT SMBus Interfaces
PES24T3G2 User Manual
5 - 4
February 22, 2012
Notes
The second type of configuration block is the sequential double word initialization sequence. It is similar
to a single double word initialization sequence except that it contains a double word count that allows
multiple sequential double words to be initialized in one configuration block.
A sequential double word initialization sequence consists of four required fields and one to 65535
double word initialization data fields. The format of a sequential double word initialization sequence is
shown in Figure 5.3. The CSR_SYSADDR field contains the starting double word CSR system address to
be initialized. The next field is the TYPE field that indicates the type of the configuration block. For sequen-
tial double word initialization sequences, this value is always 0x1. The NUMDW field specifies the number
of double words initialized by the configuration block. This is followed by the number of DATA fields speci-
fied in the NUMDW field.
Figure 5.3 Sequential Double Word Initialization Sequence Format
The final type of configuration block is the configuration done sequence which is used to signify the end
of a serial EEPROM initialization sequence. If during serial EEPROM initialization, an attempt is made to
initialize a register that is not defined in a configuration space (i.e., not defined in chapter 8!!!), then the
Unmapped Register Initialization Attempt (URIA) bit is set in the SMBUSSTS register and the write is
ignored.
The configuration done sequence consists of two fields and its format is shown in Figure 5.4. The
CHECKSUM field contains the checksum of all of the bytes in all of the fields read from the serial EEPROM
from the first configuration block to the end of this done sequence. The second field is the TYPE field which
is always 0x3 for configuration done sequences.
Figure 5.4 Configuration Done Sequence Format
Bit
0
Bit
1
Bit
2
Bit
3
Bit
4
Bit
5
Bit
6
Bit
7
Byte 0
CSR_SYSADDR[7:0]
CSR_SYSADDR[13:8]
TYPE
0x1
Byte 1
Byte 2
NUMDW[7:0]
Byte 3
NUMDW[15:8]
Byte 4
DATA0[7:0]
Byte 5
DATA0[15:8]
Byte 6
DATA0[23:16]
Byte 7
DATA0[31:24]
Byte 4n+4
DATAn[7:0]
Byte 4n+ 5
DATAn[15:8]
Byte 4n+6
DATAn[23:16]
Byte 4n+7
DATAn[31:24]
...
...
Bit
0
Bit
1
Bit
2
Bit
3
Bit
4
Bit
5
Bit
6
Bit
7
Byte 0
CHECKSUM[7:0]
Reserved
TYPE
0x3
Byte 1
(must be zero)
Содержание 89HPES24T3G2ZBAL
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Страница 16: ...IDT List of Figures PES24T3G2 User Manual viii February 22 2012 Notes...
Страница 20: ...IDT Register List PES24T3G2 User Manual xii February 22 2012 Notes...
Страница 32: ...IDT PES24T3G2 Device Overview PES24T3G2 User Manual 1 12 February 22 2012 Notes...
Страница 72: ...IDT SMBus Interfaces PES24T3G2 User Manual 5 20 February 22 2012 Notes...
Страница 76: ...IDT Power Management PES24T3G2 User Manual 6 4 February 22 2012 Notes...
Страница 156: ...IDT Configuration Registers PES24T3G2 User Manual 8 74 February 22 2012 Notes...