Panasonic AJ-YA120AG, Руководство по обслуживанию

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IEEE1394 I/F (AJ-YAD120AG) BLOCK DIAGRAM
REG.
DPRAM
IDT71V321
FPGA (DUEL) 1394 MICROPROCESSOR
UP_A[1-19]
FLASH ROM
CONNECTOR
AK6480AF
(EEPROM)
1394 PROCESS
XTAL
24.576MHz
EXTENSION
CONNECTOR
PLIF_CTRL [0-1]
PLIF_D [0-7]
SDRAM(256M)
MB29LV160
(FLASH
MEMORY)
TE7720
(FPGA CONFIG)
RESET
GEN
UP_RST_L
JTAG
PREP50
(FPGA)
SDRAM
COMP100
FILTER
BUS CTRL
(FPGA)
SD_DATA[0-7]
COMP_AUD
12,34
COMP_A,B
PP_DATA
PP_CTRL
FLT_Y,C PREP_Y,C
PIX_A,B
AUX
UP_D[0-15]
XTAL
72MHz
+3.3V_A
+2.5V_A
+1.8V_A,C
+1.5V_B
IC301 <7>
IC300 <7>
IC350 <8>
IC400 <9>
IC450 <10>
X250 <6>
IC250 <6>
P250 <6>
IP503 <11>
P500 <11>
IC502 <11>
IC200 <5>
X550, IC557 <12>
IC150 <4>
IC50 <2>
IC55 <2>
P50 <2>
IC100 <3>
IC51 <2>
IC1-5 <1>
AUDIO [0-1], AUDIO FRM
1394_SSP, FRP
SD_DATA[0-7]
RESET
DP DATA
DP ADRS
B17
B7, A/B8-9, A11
A/B2-6, A7
A/B44-49
A/B39
A/B29, B30
A/B39-42
P1 P300
PROG_B, INIT B,
CCLK, DONE
CONF_STATUS
[0-2]
CONF_STATUS
[0-2]
UP_D[0-15]
UP_A[1-19]
1394_SSP, FRP
AUDIO [0-1], AUDIO FRM
IEEE1394 I/F CIRCUIT
REC PB
CIRCUIT
TPA1
TPB1
TPA0
TPA0