10
Specifications
Section 2-1
The output offset phase is 90
°±
45
°
. Therefore, the greatest offset phase of the
encoder is 45
°
(i.e., 90
°
– 45
°
).
The Unit requires a minimum offset phase of 3.2
µ
s.
Thus:
Inverting the period yields the maximum frequency of 27.7K cps.
From the above, use the High-speed Counter at a maximum counting speed
of 27,000 cps if the High-speed Counter is connected to an encoder with a
maximum response frequency of 27,000 cps.
Note
The pulse width of counter input Z must be 100
µ
s min. if the counter is reset
with a Z-phase input from the encoder at a repetition frequency of 2000 cps
max.
The repetition frequency of line driver input must be 1,000 cps when consider-
ing the software processing time.
2-1-5
BCD or Hexadecimal Count Values
The High-speed Counter Unit can set the present counter value and the upper
and lower limit count values in BCD or hexadecimal.
The High-speed Counter Unit can process hexadecimal values faster than
BCD values because it need not convert the hexadecimal values into BCD
values.
Refer to the following for the data configuration’s BCD and hexadecimal count
values.
BCD
Example:Present counter value
The above is the data configuration of the present counter value stored in
words n+2 and n+3 of the data area.
Counting range: –8,388,608 to 8,388,607
Hexadecimal
The sign of the hexadecimal value is determined with 2’s complement of the
leftmost bit.
4.5
µ
s
T
--------------
45
°
360
°
-----------
<
(When the rise and fall of the Encoder's
output are equivalent.)
T
36
µ
s
<
(T is the minimum pulse period that for
responses.)
1
T
---
1
36
µ
s
-------------
27.7K cps
=
<
(78 revolutions/s when there are
500 pulses/revolution)
Sign
Set to 0.
Data within a range of 000000 to
FFFFFF is stored. Refer to the
following for the actual count values.
Содержание C200H-CT021
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