NXP Semiconductors MC9S08LG16, Справочное руководство

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Chapter 19 Debug Module (DBG) (64K)
MC9S08LG32 MCU Series, Rev. 5
Freescale Semiconductor 361
19.3.2.12 Debug Control Register (DBGC)
Module Base + 0x000C
7 6 5 4 3 2 1 0
R
DBGEN ARM TAG BRKEN
0 0 0
LOOP1
W
POR
or non-
end-run
1 1 0 0 0 0 0 0
Reset
end-run
1
1
In the case of an end-trace to reset where DBGEN=1 and BEGIN=0, the ARM and BRKEN bits are cleared but the remaining
control bits in this register do not change after reset.
U 0 U 0 0 0 0 U
= Unimplemented or Reserved
Figure 19-13. Debug Control Register (DBGC)
Table 19-14. DBGC Field Descriptions
Field Description
7
DBGEN
DBG Module Enable Bit — The DBGEN bit enables the DBG module. The DBGEN bit is forced to zero and
cannot be set if the MCU is secure.
0 DBG not enabled
1 DBG enabled
6
ARM
Arm Bit — The ARM bit controls whether the debugger is comparing and storing data in FIFO. See
Section 19.4.4.2, “Arming the DBG Module,” for more information.
0 Debugger not armed
1 Debugger armed
5
TAG
Tag or Force Bit — The TAG bit controls whether a debugger or comparator C breakpoint will be requested as
a tag or force breakpoint to the CPU. The TAG bit is not used if BRKEN = 0.
0 Force request selected
1 Tag request selected
4
BRKEN
Break Enable Bit — The BRKEN bit controls whether the debugger will request a breakpoint to the CPU at the
end of a trace run, and whether comparator C will request a breakpoint to the CPU.
0 CPU break request not enabled
1 CPU break request enabled
0
LOOP1
Select LOOP1 Capture Mode — This bit selects either normal capture mode or LOOP1 capture mode. LOOP1
is not used in event-only modes.
0 Normal operation - capture COF events into the capture buffer FIFO
1 LOOP1 capture mode enabled. When the conditions are met to store a COF value into the FIFO, compare the
current COF address with the address in comparator C. If these addresses match, override the FIFO capture
and do not increment the FIFO count. If the address does not match comparator C, capture the COF address,
including the PPACC indicator, into the FIFO and into comparator C.