NXP Semiconductors MC9S08LG16, Справочное руководство

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Chapter 5 Resets, Interrupts, and General System Control
MC9S08LG32 MCU Series, Rev. 5
Freescale Semiconductor 93
5.8.12 Pin Position Control Register (PINPS2)
This high-page register contains the control bits that determine which of the two potential pins is used as
the source for the TPMx pin function. The default source is the pin available on the 48-pin package.
7 6 5 4 3 2 1 0
R
TPM2[5] TPM2[4] TPM2[3] TPM2[2] TPM2[1] TPM2[0] TPM1[1] TPM1[0]
W
Reset: 0 0 0 0 0 0 0 0
Figure 5-14. Pin Position Control Register (PINPS2)
Table 5-16. PINPS2 Register Field Descriptions
Field Description
7
TPM2[5]
TPM2[5] Pin Position — This bit controls the pin position of TPM2[5].
0 TPM2[5] sourced from PTF3
1 TPM2[5] sourced from PTH6
6
TPM2[4]
TPM2[4] Pin Position — This bit controls the pin position of TPM2[4].
0 TPM2[4] sourced from PTF4
1 TPM2[4] sourced from PTH7
5
TPM2[3]
TPM2[3] Pin Position — This bit controls the pin position of TPM2[3].
0 TPM2[3] sourced from PTF5
1 TPM2[3] sourced from PTI2
4
TPM2[2]
TPM2[2] Pin Position — This bit controls the pin position of TPM2[2].
0 TPM2[2] sourced from PTF0
1 TPM2[2] sourced from PTI3
3
TPM2[1]
TPM2[1] Pin Position — This bit controls the pin position of TPM2[1].
0 TPM2[1] sourced from PTA6
1 TPM2[1] sourced from PTI4
2
TPM2[0]
TPM2[0] Pin Position — This bit controls the pin position of TPM2[0].
0 TPM2[0] sourced from PTA5
1 TPM2[0] sourced from PTI5
1
TPM1[1]
TPM1[1] Pin Position — This bit controls the pin position of TPM1[1].
0 TPM1[1] sourced from PTF2
1 TPM1[1] sourced from PTH4
0
TPM1[0]
TPM1[0] Pin Position — This bit controls the pin position of TPM1[0].
0 TPM1[0] sourced from PTF1
1 TPM1[0] sourced from PTH5