UM10462
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© NXP B.V. 2016. All rights reserved.
User manual
Rev. 5.5 — 21 December 2016
16 of 523
NXP Semiconductors
UM10462
Chapter 2: LPC11U3x/2x/1x Memory mapping
SSP1 available on 48-pin packages only.
Fig 4.
LPC11U1x memory map
APB peripherals
0x4000 4000
0x4000 8000
0x4000 C000
0x4001 0000
0x4001 8000
0x4002 0000
0x4002 8000
0x4003 8000
0x4003 C000
0x4004 0000
0x4004 4000
0x4004 8000
0x4004 C000
0x4004 C000
0x4005 8000
0x4005 C000
0x4006 0000
0x4006 4000
0x4008 0000
0x4002 4000
0x4001 C000
0x4001 4000
0x4000 0000
WWDT
32-bit counter/timer 0
32-bit counter/timer 1
ADC
USART/SMART CARD
PMU
I
2
C-bus
20 - 21 reserved
10 - 13 reserved
reserved
reserved
25 - 31 reserved
0
1
2
3
4
5
6
7
8
9
16
15
14
17
18
reserved
reserved
0x0000 0000
0 GB
0.5 GB
4 GB
1 GB
0x1000 1000
0x1FFF 0000
0x1FFF 4000
0x2000 0000
0x5000 0000
0x5000 4000
0xFFFF FFFF
reserved
reserved
reserved
2 kB USB RAM
reserved
0x4000 0000
0x4008 0000
0x4008 4000
APB peripherals
USB
GPIO
0x2000 4000
0x2000 4800
4 kB SRAM
0x1000 0000
LPC11U12/13/14
0x0000 6000
0x0000 4000
24 kB on-chip flash (LPC11U13)
0x0000 8000
32 kB on-chip flash (LPC11U14)
16 kB on-chip flash (LPC11U12)
16 kB boot ROM
0x0000 0000
0x0000 00C0
active interrupt vectors
002aaf891
reserved
reserved
SSP0
SSP1
16-bit counter/timer 1
16-bit counter/timer 0
IOCON
system control
19
GPIO interrupts
22
23
GPIO GROUP0 INT
24
GPIO GROUP1 INT
flash controller
0xE000 0000
0xE010 0000
private peripheral bus