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CHAPTER 7 TIMER/COUNTER FUNCTION
173
Figure 7-27. Timing of One-Shot Pulse Output Operation with Software Trigger
Count clock
TMn count value
N
N
N
N
0001H
0000H
M
M
−
1
N
N
−
1
0000H
N
N + 1
0000H
0001H
CRn1 set value
CRn0 set value
OSPTn
INTTMn1
INTTMn0
TOn0 pin output
Sets 0CH to TMCn
(TMn count starts)
M
M
M
M
Caution
The 16-bit timer register n starts operating as soon as a value other than 0, 0 (operation stop
mode) has been set to TMCn2 and TMCn3.
Remark
n = 0, 1
(2) One-shot pulse output with external trigger
A one-shot pulse can be output from the TOn0 pin by setting the 16-bit timer mode control register n (TMCn),
capture/compare control register n (CRCn), and 16-bit timer output control register n (TOCn) as shown in Figure
7-28, and by using the valid edge of the TIn0 pin as an external trigger.
The valid edge of the TIn0 pin is specified by bits 4 and 5 (ESn00 and ESn01) of the prescaler mode register n
(PRMn). The rising, falling, or both the rising and falling edges can be specified.
When the valid edge of the TIn0 pin is detected, the 16-bit timer/event counter is cleared and started, and the
output is asserted active at the count value set in advance to the 16-bit capture/compare register n1 (CRn1).
After that, the output is deasserted inactive at the count value set in advance to the 16-bit capture/compare
register n0 (CRn0).
Caution
Even if the external trigger is generated again while the one-shot pulse is output, it is
ignored.
Содержание V850/SA1 mPD703015
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