User’s Manual U18172EJ2V0UD
8
CONTENTS
CHAPTER 1 OVERVIEW.........................................................................................................................14
1.1 Features .........................................................................................................................................14
1.2 Ordering Information....................................................................................................................15
1.3 Pin Configuration (Top View) ......................................................................................................16
1.4 78K0S/Kx1+ Product Lineup........................................................................................................17
1.5 Block Diagram...............................................................................................................................18
1.6 Functional Outline ........................................................................................................................19
CHAPTER 2 PIN FUNCTIONS ...............................................................................................................20
2.1 Pin Function List...........................................................................................................................20
2.2 Pin Functions ................................................................................................................................22
2.2.1 P20 to P23 (Port 2)............................................................................................................................22
2.2.2 P32 and P34 (Port 3).........................................................................................................................23
2.2.3 P40 and P43 (Port 4).........................................................................................................................23
2.2.4 RESET ..............................................................................................................................................23
2.2.5 X1 and X2..........................................................................................................................................23
2.2.6 V
DD
....................................................................................................................................................23
2.2.7 V
SS
....................................................................................................................................................23
2.3 Pin I/O Circuits and Connection of Unused Pins ......................................................................24
CHAPTER 3 CPU ARCHITECTURE ......................................................................................................26
3.1
Memory Space...............................................................................................................................26
3.1.1 Internal program memory space........................................................................................................29
3.1.2 Internal data memory space ..............................................................................................................30
3.1.3 Special function register (SFR) area..................................................................................................30
3.1.4 Data memory addressing ..................................................................................................................30
3.2
Processor Registers .....................................................................................................................33
3.2.1 Control registers ................................................................................................................................33
3.2.2 General-purpose registers.................................................................................................................36
3.2.3 Special function registers (SFRs) ......................................................................................................37
3.3 Instruction Address Addressing.................................................................................................41
3.3.1 Relative addressing ...........................................................................................................................41
3.3.2 Immediate addressing .......................................................................................................................42
3.3.3 Table indirect addressing ..................................................................................................................42
3.3.4 Register addressing...........................................................................................................................43
3.4
Operand Address Addressing.....................................................................................................44
3.4.1 Direct addressing ..............................................................................................................................44
3.4.2 Short direct addressing......................................................................................................................45
3.4.3 Special function register (SFR) addressing .......................................................................................46
3.4.4 Register addressing...........................................................................................................................47
3.4.5 Register indirect addressing ..............................................................................................................48
