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CHAPTER 5 CLOCK GENERATORS
User’s Manual U18172EJ2V0UD
78
Figure 5-13. Status Transition of Default Start by External Clock Input
HALT
STOP
HALT
instruction
STOP
instruction
V
DD
> 2.1 V
±
0.1 V
Start with PCC = 02H,
PPCC = 02H
Interrupt
Reset signal
Interrupt
Power
application
Reset by
power-on clear
External clock input
selected by option byte
Clock division ratio
variable during
CPU operation
Remark
PCC:
Processor clock control register
PPCC: Preprocessor clock control register