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Nations Technologies Inc.
Tel
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CAN_INTE.FOVITE bit is set), a FIFO overrun interrupt request will be generated.
20.4.5
Identifier filtering
In the CAN network, when basic CAN is in the transmitter state, it broadcasts a message to each node by sending a
message to the bus; when basic CAN is in the receiver state, it determines whether the node needs the message
according to the identifier of the message after receiving the message. If message is vaild, CAN core copies the
message to SRAM(CAN's own SRAM); If it is not needed, the message will be discarded. This process does not
require software intervention. Compared with software filtering, hardware filtering reduces the CPU usage. CAN
controller provides 14 configurable filter banks (0~13) with variable bit width for application programs to meet this
demand. These filter banks are used to receive only those messages needed by software. Each filter bank x contains
two 32-bit registers, namely CAN_FxR0 and CAN_FxR1.
Setting of filter bit width and mode
Each filter in a filter bank is numbered (filter number, from 0 to a certain maximum value) depending on the mode
and bit width setting of the filter bank. See the figure below for the filter configuration.The filter group can be
configured through the corresponding CAN_FMC register. Filter banks that are not used by the application should
be kept disabled. Before configuring a filter bank, it must be set to the disabled state by clearing the CAN_FA1.FAC
bit.
By setting the corresponding CAN_FS1.FSCx bit you can configure the bit width of a filter bank, see Figure 20-9.
By means of the CAN_FM1.FBx bit, the corresponding mask/identifier register can be configured to be the
identifier
list
or
identifier mask
mode.The filter group should be set to work in the mask mode in order to filter out a group of
identifiers. And the filter group should be set to work in identifier list mode in order to filter out an identifier.