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Introduction
CP6500-V
Page 1 - 12
© 2005 Kontron Modular Computers GmbH
ID 28945, Rev. 01
P R E L I M I N A R Y
2894
5.01.UG.VC.050304/09095
1
Interfaces
CompactPCI
Compliant with CompactPCI Specification PICMG
®
2.0 R 3.0
•
System Master operation
•
32-bit / 33 MHz master interface
•
3.3 V and 5.0 V compliant (default configuration: 5V)
When the CP6500-V is operated in a peripheral slot, the CPCI bus is electri-
cally isolated (passive mode).
Rear I/O
The following interfaces are routed to the rear I/O connector J3, J4 and J5:
•
COM1 and COM2 (RS232, RS422 and RS485 signaling); no buffer on the
rear I/O module is necessary
•
2 x USB 2.0
•
CRT VGA
•
PS/2 (Mouse / Keyboard)
•
2 x Fast Ethernet (compliant with PICMG 2.16, R 1.0)
•
Secondary EIDE (ATA 100)
•
General purpose signals
•
PMC rear I/O
•
Floppy disk interface
Hot Swap Compatible
The CP6500-V supports System Master hot swap functionality and
application dependent hot swap functionality when used in a peripheral slot.
When used as a System Master the CP6500-V supports individual clocks for
each slot and ENUM signal handling is in compliance with the PICMG 2.1 Hot
Swap Specification, Rev. 2.0, January 17, 2001.
VGA
Built-in Intel 2D and 3D Graphics accelerator:
•
Supports resolutions of up to 1600 x 1200 by 8-bit color resolution at a 75 Hz
refresh rate or up to 1280 x 1024 by 24-bit color resolution at an 85 Hz re-
fresh rate.
•
Hardware motion compensation for software MPEG2 and MPEG4 decoding
•
The graphics controller provides flexible allocation of video memory up to
6 MB.
Fast Ethernet
Up to two 10 Base-T/100 Base-TX Fast Ethernet interfaces based on the Intel
82551ER Ethernet 32-bit PCI bus controller.
•
Two channels on rear I/O
•
Two RJ45 connectors on the front panel
•
Automatic mode recognition
•
Automatic cabling configuration recognition
Cabling requirement: Category 5, UTP
USB
Four USB ports supporting UHCI and EHCI:
•
Two USB 2.0 connectors on the front panel
•
Two USB 2.0 on the rear I/O interface
Serial
Two serial ports from Super I/O
•
COM1 on the front panel or rear I/O
•
COM2 on the rear I/O interface (RS232, RS422 and RS485 signaling)
PMC
CMC / PMC P1386 / Draft 2.4a compliant mezzanine interface
•
J23, J24, and J25 PCI mezzanine connectors for standard PMC modules
•
32-bit / 33 MHz PCI interface
•
3.3 V and 5 V compatible (default configuration 5V)
•
Rear I/O supported through the CompactPCI connector J4
Table 1-2: CP6500-V Main Specifications (Continued)
CP6500-V
SPECIFICATIONS
Содержание CP6500-V
Страница 127: ...CP6500 V Setup for AMIBIOS8 MAN EZP 80 07 12 02...
Страница 138: ...6 Chapter 2 Main Setup This page has been intentionally left blank...
Страница 158: ...26 Chapter 3 Advanced BIOS Setup This page has been intentionally left blank...
Страница 182: ...50 Chapter 9 Exit Menu This page has been intentionally left blank...
Страница 184: ...52 Chapter 10 Deleting a Password This page has been intentionally left blank...
Страница 190: ...58 Chapter 11 POST Codes This page has been intentionally left blank...