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CP6500-V
Power Consumption
ID 28945, Rev. 01
© 2005 Kontron Modular Computers GmbH
Page 6 - 5
P R E L I M I N A R Y
2894
5.01.UG.VC.050304/09095
5
6.1.3.1
Start-Up Requirement
Power supplies must comply with the following guidelines, in order to be used with the
CP6500-V.
• Beginning at 10% of the nominal output voltage, the voltage must rise within
> 0.1 ms to < 20 ms to the specified regulation range of the voltage. Typically:
> 5 ms to < 15 ms.
• There must be a smooth and continuous ramp of each DC output voltage from
10% to 90% of the regulation band.
• The slope of the turn-on waveform shall be a positive, almost linear voltage increase and
have a value from 0 V to nominal Vout.
6.1.3.2
Power-Up Sequence
The +5 VDC output level must always be equal to or higher than the +3.3 VDC output during
power-up and normal operation.
The time from +5 VDC until the output reaches its minimum in regulation level and from
+3.3 VDC until the output reaches its minimum in regulation level must be < 20 ms.
6.1.3.3
Tolerance
The tolerance of the voltage lines is described in the CPCI specification (PICMG 2.0 R3.0).The
recommended measurement point for the voltage is the CPCI connector on the CPU board.
The following table provides information regarding the required characteristics for each board
input voltage.
The output voltage overshoot generated during the application (load changes) or during the
removal of the input voltage must be less than 5% of the nominal value. No voltage of reverse
polarity may be present on any output during turn-on or turn-off.
Table 6-3: Input Voltage Characteristics
VOLTAGE
NOMINAL VALUE
TOLERANCE
MAX. RIPPLE (p-p)
REMARKS
5 V
+5.0 VDC
+5%/-3%
50 mV
Main voltage
3.3 V
+3.3 VDC
+5%/-3%
50 mV
--
+12 V
+12 VDC
+5%/-5%
240 mV
Required
-12 V
-12 VDC
+5%/-5%
240 mV
Only for PMC
V I/O (PCI) voltage
+3.3 VDC or +5 VDC
+5%/-3%
50 mV
Standard Version
+5.0V
GND
Ground, not directly connected to potential earth (PE)
Содержание CP6500-V
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