
TOS5300_INTERFACE
49
IEEE 488.2 Register Model
3
Co
m
m
a
n
d
R
e
fe
re
n
ce
Event status register (standard event status register)
The event status register bits are set when certain events occur during TOS5300 Series operation.
All the event status register bits are set by the error/event queue.
This register is defined by the IEEE 488.2 standard and is controlled by the IEEE 488.2 common
commands *ESE, *ESE?, and *ESR?.
Bit
Bit
weight
Bit name
Description
0
1
Operation Complete (OPC)
Set when an *OPC command is received and all
operations in standby have been completed.
1
2
Request Control (RQC)
—
2
4
Query Error (QYE)
Set when an attempt is made to read data from the
output queue when there is no data or when the
output queue is not in the wait state.
This indicates that there is no data in the output
queue.
3
8
Device Dependent Error (DDE) Set when there is a device-specific error.
4
16
Execution Error (EXE)
Set when the TOS5300 Series evaluates that the
program data after the header is outside the formal
input range or does not match the specifications of
the TOS5300 Series.
This indicates that a valid SCPI command may not be
executed correctly depending on the state of the
TOS5300 Series.
5
32
Command Error (CME)
Set when an IEEE 488.2 syntax error is detected by the
parser, when an unidentifiable header is received, or
when a group execution trigger enters the internal
IEEE 488.2 SCPI command input buffer.
6
64
User Request (URQ)
—
7
128
Power ON (PON)
Set when the power is turned on.
8-15
—
Reserved
—
Содержание TOS5300
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