Intel SRMK2 - Server Platform - 0 MB RAM, Технические характеристики

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Intel® SRMK2 Internet Server Technical Product Specification 34
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4M bytes of video SDRAM organized as 2Mx32-bits, accessible over the 64-bit
interface of the controller.
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DDC1 and DDC2B+ for plug and play monitors.
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Power management for full VESA DPMS and EPA Energy Star compliance.
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Integrated hardware diagnostic tests performed automatically upon initialization.
3.12 Hardware Monitor
Two Heceta 3 controllers are provided on the motherboard to monitor temperature, voltage, and
fan speed. In addition to the on chip temperature sensor, each Heceta provides input pins for
connection to an external temperature sensor. These inputs are connected to the Pentium® III
thermistor outputs.
Access to the two Heceta controllers is provided through the SMB bus. Heceta #1 is mapped
onto SMB address [0101 101x]. Heceta #2 is mapped onto SMB address [0101 110x], where x is
the Read/Write bit of the SMB bus. These can also be listed as 0x2d and 0x2e. Table 17 shows
the functions monitored by each Heceta controller.
When the Heceta is configured in the monitoring mode, it cycles sequentially through the
measurement of analog inputs and the temperature sensor, while at the same time the fan speed
inputs are independently monitored. Measured values from these inputs are stored in Value
Registers. These can be read out over the serial bus or can be compared with programmed limits
stored in the Limit Registers. The results of out of limit comparisons are stored in the Interrupt
Status Registers and will generate an interrupt on the
INT line, if enabled. Any or all of the
Interrupt Status Bits can be masked by appropriate programming of the Interrupt Mask Register.
There are 9 Fans in the SRMK2 System which are multiplexed into the Fan1/Fan2 inputs of the
Heceta chips, as shown in Table 17. The Mux1/Mux0 control signals are software controlled bits
located in the front panel EPLD and are used to control the fan tachometer multiplexer located on
the Backplane. The software control is located in the Advanced Server Management software.
Table 17: Functions monitored by the Heceta controllers
Heceta Pin Mux1/Mux0 Control
Heceta #1 Function
SMB addr 0101 101x
Heceta #2 Function
SMB addr 0101 110x
00 Fan Tach 1 Fan Tach 3
01 Fan Tach 5 Fan Tach 7
10 Fan Tach 9 N/A
Fan 1
11 N/A N/A
00 Fan Tach 2 Fan Tach 4
01 Fan Tach 6 Fan Tach 8
10 N/A N/A
Fan 2
11 N/A N/A
CHS
Chassis Intrusion
(Not functional on SRMK2)
N/A
+VCCP1 VCORE N/A
+2.5V VTT +2.5V
+3.3V +3.3V +3.3V STBY
+5V +5V +5V STBY