Intel SRMK2 - Server Platform - 0 MB RAM, Технические характеристики

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Intel® SRMK2 Internet Server Technical Product Specification 28
3.4 Chipset
The ServerWorks
®
ServerSet
™
III LE chipset consists of the ServerWorks CNB30LE North
Bridge chip and the ServerWorks OSB4 South Bridge chip. The CNB30LE provides an optimized
DRAM controller. The I/O subsystem of the ServerWorks chipset is based on the OSB4 South
Bridge, which is a highly integrated PCI ISA IDE Xcelerator Bridge.
3.4.1 ServerWorks CNB30LE North Bridge Chip
The ServerWorks CNB30LE North Bridge chip provides bus-control signals, address paths, and
data paths for transfers between the processor’s host bus, the PCI bus, and main memory.
The North Bridge features:
Processor Interface Control
•
Support for processor host bus frequency of 100MHz and 133MHz
•
32-bit addressing
• Desktop-optimized GTL+ compliant host bus interface
Integrated DRAM Controller
•
+3.3V only DIMM DRAM configurations
•
Up to four double -sided DIMMs
• 100MHz or 133MHz SDRAM
•
Support for up to 4GB of registered SDRAM
•
DIMM serial presence detect via SMBus interface
•
16-, 64- and 128-Mbit devices with 2 KB, 4 KB, and 8 KB page sizes
• x 4, x 8, and x 16 DRAM widths
•
Single error correction, multiple error detection
•
Symmetrical and asymmetrical DRAM addressing
•
ECC SEC/DED
PCI Bus Interface
•
Complies with the PCI specification Rev. 2.1
•
64 bit, 33/66 MHz Secondary PCI bus interface with integrated PCI arbiter
•
Asynchronous coupling to the host-bus frequency
• PCI parity generation support
•
Data streaming support from PCI-to-DRAM
•
Support for four PCI bus masters in addition to the host and PCI-to-ISA I/O bridge
•
Support for concurrent host and PCI transactions to main memory
Data Buffering
•
DRAM write buffer with read-around-write capability
•
Dedicated host-to-DRAM, PCI0-to-DRAM, and PCI1-to-DRAM read buffers
Power Management
• Support for system suspend/resume
•
Compliant with ACPI power management
SMBus Support for desktop management functions
Support for System Management Mode (SMM)
Glueless Serial interface with OSB4 South Bridge chip