Intel SRMK2 - Server Platform - 0 MB RAM, Технические характеристики

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Intel® SRMK2 Internet Server Technical Product Specification 75
7.3.5.3 Ultra DMA IDE Support
The SRMK2 BIOS provides Ultra DMA IDE support. This feature can be disabled via BIOS
setup.
7.3.6 OEM Customization
OEMs can customize the BIOS for product differentiation. The extent of customization is limited
to what is stated in this section. OEMs can change the BIOS look and feel and manage OEM-
specific hardware, if any, by executing their own code during the POST sequence. OEMs can
modify the contents of the message strings and supported languages by translating Intel supplied
strings into the desired language. The code in a user binary may not hook critical interrupts,
reprogram the PCIset, or take any action that affects the correct functioning of the system BIOS.
7.3.6.1 User-supplied BIOS Code Support
A 16KB region of Flash ROM is available to store the User Binary. Using the iFLASH utility,
this region can be updated with OEM supplied code and data – a User Binary. At several points
throughout POST control is passed to this User Binary.
The User Binary must adhere to the following requirements:
1. In order to be recognized by the BIOS and protected from runtime memory
managers, the User Binary must have an Option ROM header (55AA, size).
2. The system BIOS performs a scan of the User Binary Area at predefined points
during POST. Mask bits must be set within the User Binary that inform the BIOS
if an entry point exists for a given time during POST.
3. The system state must be preserved by the User Binary.
4. The user Binary code must be relocatable. It will be located within the first
Megabyte. The User Binary code should not make any assumptions about the value
of the code segment.
5. The user Binary code will always be executed from RAM and never from flash.
The BIOS copies the User Binary into system memory before the first scan point. If the User
Binary reports that it does not contain runtime code, it is located in conventional memory (0-640k)
saving limited option ROM space. If the User Binary code is required at runtime, it is copied to
option ROM space. At each scan point during POST, the system BIOS will determine if this
scan point has a corresponding User Binary entry point to transfer control to. To determine this,
the bitmap at byte 4 of the header is tested against the current mask bit (which has been
determined/defined by the scan point). If the bitmap has the appropriate bit set, the mask is
placed in AL and execution is passed to the address computed by (ADR(Byte 5)+5*scan
sequence #).
During execution, the User Binary may access 11 bytes of Extended BIOS Data Area RAM
(EBDA). The segment of the EBDA can be found at address 40:0e. Offset 18 to offset 21h is
available for the User Binary. The BIOS also reserves four CMOS bits for the User Binary.
These bits are in a region of CMOS that is not checksummed with default values of zero. These
bits will be contiguous, but are not in a fixed location. Upon entry into the User Binary, the DX
register will contain a ‘token’ that points to the reserved bits.