Intel 82562EX, Руководство по конструкции

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82540EP/82541(PI/GI/EI) & 82562EZ(EX) Dual Footprint Design Guide
Contents
1.0 Introduction ...................................................................................................................... 1
1.1 Scope .................................................................................................................... 1
1.2 Reference Documents........................................................................................... 2
1.3 Product Codes....................................................................................................... 2
2.0 System Data Port Interfaces............................................................................................ 3
2.1 LCI Connection to 82562EZ(EX) Platform LAN Connect Device .......................... 3
2.2 PCI Interface for 82540EP/82541xx Family of Gigabit Controllers ....................... 4
3.0 Ethernet Component Design Guidelines ....................................................................... 5
3.1 General Design Considerations for Ethernet Controllers ...................................... 5
3.1.1
Crystal Selection Parameters................................................................... 5
3.1.2 Reference Crystal..................................................................................... 9
3.1.3 Reference Crystal Selection ..................................................................... 9
3.1.4 Circuit Board........................................................................................... 10
3.1.5 Temperature Changes ........................................................................... 10
3.1.6 Integrated Magnetics Module ................................................................. 10
3.2 Designing with the 82562EZ(EX) Platform LAN Connect Device ....................... 11
3.2.1
82562EZ(EX) PLC Device LAN Disable Guidelines...............................11
3.2.2 Serial EEPROM for 82562EZ(EX) Implementations .............................. 11
3.2.3 Magnetics Modules for 82562EZ(EX) PLC Device ................................ 12
3.2.4 Power Supplies for 82562EZ(EX) PLC Implementations ....................... 12
3.2.5 82562EZ(EX) Device Test Capability..................................................... 12
3.3 Designing with the 82541xx Gigabit Controllers..................................................13
3.3.1
82541xx Ethernet Controller LAN Disable Guidelines............................ 13
3.3.2 Serial EEPROM for 82541xx Controller Implementations ...................... 14
3.3.3 EEPROM Map Information .....................................................................15
3.3.4 Magnetics Modules for 82541xx Controller Applications........................16
3.3.5 Oscillators for 82541PI(GI) Controllers ..................................................16
3.3.6 Power Supplies for the 82541xx Controller ............................................19
3.3.7 82541xx Controller Power Supply Filtering ............................................19
3.3.8 82541xx Controller Power Management and Wake Up ......................... 19
3.3.9 82541xx Device Test Capability ............................................................. 20
4.0 Ethernet Component Layout Guidelines...................................................................... 21
4.1 General Layout Considerations for Ethernet Controllers.....................................21
4.1.1
Guidelines for Component Placement.................................................... 21
4.1.2 Crystals .................................................................................................. 22
4.1.3 Board Stackup Recommendations......................................................... 23
4.1.4 Differential Pair Trace Routing ...............................................................23
4.1.5 Signal Trace Geometry .......................................................................... 24
4.1.6 Trace Length and Symmetry .................................................................. 25
4.1.7 Impedance Discontinuities .....................................................................25
4.1.8 Reducing Circuit Inductance .................................................................. 25
4.1.9 Signal Isolation ....................................................................................... 26
4.1.10 Power and Ground Planes .....................................................................26
4.1.11 Traces for Decoupling Capacitors .......................................................... 27