82540EP/82541(PI/GI/EI) & 82562EZ(EX) Dual Footprint Design Guide
44
P5
AD[3]
AD[3]
NC
X
AD[3]
AD[3]
AD[3]
P6
AD[2]
AD[2]
NC
X
AD[2]
AD[2]
AD[2]
P7
EECS
EECS
NC
X
EECS
EECS
EECS
If EE from ICH
and 82540EP
are shared, a
0
Ω
pop is
required
because ICH
drives this in
reset.
P8
VSS
VSS
VSSA
X
X
VSS
VSS
VSS
VSSA = VSS
P9
FLSH_SO/
LAN_DISABLE#
FLSH_SO
NC
X
LAN_EN
LAN_EN
LAN_EN
Connect to
LAN Enable
signal
P10
EEDI
EEDI
NC
X
EEDI
EEDI
EEDI
If desired, this
can be shorted
to the ICH
EEDI because
it is an input in
ICH in reset.
P11
CTRL12
CTRL15
NC
X
Pwr Regulator
Pwr Regulator
No stuff
Connect to
PNP. Don’t'
stuff PNP on
82562EZ(EX).
P12
3.3 V
3.3 V
VCC
X
X
3.3 V
3.3 V
3.3 V
VCCP = 3.3 V
P13
SDP[1]
SDP[1]
JRXD[0]
X
X
LCI
LCI
LCI
ICH expects
this signal to be
high or
undriven.
P14
NC
NC
NC
NC
NC
NC
1.
This column will be checked if the 82562EZ pin names are different from their 82540EP/82541xx counterparts.
2.
This column will be checked if the 82562EZ signal is different from the 82540EP/82541xx AND the 82562EZ gets a connection.
Table 13. Ball Number to Signal Mapping (Sheet 8 of 8) (Continued)
Population Options
Ball
Ref
82541xx
Pin
Name
82540EP
Pin Name
82562EZ
Pin Name
D
1
K
2
82541xx
82540EP
82562EZ
Comments
Содержание 82562EX
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