Intel 82562EX, Руководство по конструкции

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82540EP/82541(PI/GI/EI) & 82562EZ(EX) Dual Footprint Design Guide
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When the 82541xx controller transitions to either of the D3 low power states, the 1.2 V, 1.8 V, and
3.3 V sources must continue to be supplied to the device. Otherwise, it will not be possible to use a
wakeup mechanism. The AUX_POWER signal is a logic input to the 82541xx controller that
denotes auxiliary power is available. If AUX_POWER is asserted, the 82541xx device will
advertise that it supports wake up from a D3cold state.
The 82541xx device supports both Advanced Power Management (APM) wakeup and Advanced
Configuration and Power Interface (ACPI) wakeup. APM wakeup has also been known in the past
as “Wake on LAN.”
Wakeup uses the PME# signal to wake the system. PME# is an active low signal connected to a
GPIO port on the ICH5 that goes active in response to receiving a Magic Packet*, a network wake-
up packet, or link status change indication. PME# remains asserted until it is disabled through the
Power Management Control/Status Register.
3.3.9 82541xx Device Test Capability
The 82541xx Gigabit Ethernet Controller contains a test access port conforming to the IEEE
1149.1a-1994 (JTAG) Boundary Scan specification. To use the test access port, these balls need to
be connected to pads accessible by the test equipment. The TRST# input also needs to be
connected to ground through a pull-down resistor (approximately 1 K
Ω
value for the 82541GI(EI)
and 100
Ω
for the 82541PI) so that the test capability cannot be invoked by mistake.
A Boundary Scan Definition Language (BSDL) file describing the 82541xx device is available for
use in your test environment.
The controller also contains an XOR test tree mechanism for simple board tests. Details of XOR
tree operation may be obtained through your Intel representative.