Intel 82562EX, Руководство по конструкции

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82540EP/82541(PI/GI/EI) & 82562EZ(EX) Dual Footprint Design Guide
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4.1.9 Signal Isolation
To maintain best signal integrity, keep digital signals far away from the analog traces. A good rule
of thumb is no digital signal should be within 300 mils (7.5 mm) of the differential pairs. If digital
signals on other board layers cannot be separated by a ground plane, they should be routed at right
angles with respect to the differential pairs. If there is another LAN controller on the board, take
care to keep the differential pairs from that circuit away.
Some rules to follow for signal isolation:
•
Separate and group signals by function on separate layers if possible. Maintain a gap of 100
mils between all differential pairs (Ethernet) and other nets, but group associated differential
pairs together. Over the length of the trace run, each differential pair should be at least 0.1 inch
away from any parallel signal traces.
•
Physically group together all components associated with one clock trace to reduce trace
length and radiation.
•
Isolate I/O signals from high-speed signals to minimize crosstalk, which can increase EMI
emission and susceptibility to EMI from other signals.
•
Avoid routing high-speed LAN traces near other high-frequency signals associated with a
video controller, cache controller, processor, or other similar devices.
4.1.10 Power and Ground Planes
Good grounding requires minimizing inductance levels in the interconnections and keeping ground
returns short, signal loop areas small, and power inputs bypassed to signal return, will significantly
reduce EMI radiation.
The following guidelines help reduce circuit inductance in both back planes and motherboards:
•
Route traces over a continuous plane with no interruptions. Do not route over a split power or
ground plane. If there are vacant areas on a ground or power plane, avoid routing signals over
the vacant area. This will increase inductance and EMI radiation levels.
•
Separate noisy digital grounds from analog grounds to reduce coupling. Noisy digital grounds
may affect sensitive DC subsystems.
•
All ground vias should be connected to every ground plane and every power via should be
connected to all power planes at equal potential. This helps reduce circuit inductance.
•
Use vias in pairs. Two (or more) small vias have less inductance and are preferable over large
vias. The small vias may also require less board space.
•
Physically locate grounds between a signal path and its return. This will minimize the loop
area.
•
Avoid fast rise/fall times as much as possible. Signals with fast rise and fall times contain
many high frequency harmonics, which can radiate EMI.
•
The ground plane beneath the magnetics module should be split. The RJ-45 connector side of
the transformer module should have chassis ground beneath it.
•
Power planes are not recommended as reference (or AC ground) planes for the differential
since most of them are noisy and can contaminate signals.