82540EP/82541(PI/GI/EI) & 82562EZ(EX) Dual Footprint Design Guide
17
3.3.5.1
82541GI (B1 Stepping) Oscillator Solution
The oscillator solution for the 82541GI includes capacitor C1, which forms a capacitor divider with
capacitor C
stray
of approximately 20 pF. This attenuates the input clock amplitude and adjusts the
oscillator load capacitance where
V
in
= VDD * (C1/(C1 + C
stray
))
V
in
= 3.3 * (C1/(C1 + C
stray
))
This enables load clock oscillators of 15 pF to be used. If the value of C
stray
is unknown, C1 should
be adjusted by tuning the input clock amplitude to approximately 1 V
ptp
. If C
stray
equals 20 pF,
then C1 is 10 pF ±10%.
The architecture of the 82541 crystal oscillator requires a differential clock on the X1 and X2 input
signals or a single ended clock input on the X1 pin with common mode biasing of the X2 pin. A
relatively low drive strength of the 82541GI crystal driver does not guarantee the differential X1
and X2 inputs with a single ended external clock oscillator. Therefore, the resistive common mode
bias circuitry should be added to produce a common mode voltage (V
CM
) of approximately 0.6 V
on the X2 pin. The resistive divider (R3 and R4) and the decoupling capacitor (C3) are required to
form and stabilize the biasing circuit for the X2 pin. The resistive divider R1 and R2 produces a
V
CM
of about 0.6 V for the input clock of the X1 pin.
Note:
The resistor tolerance should be within ±10%.
Note:
The power consumption of additional circuitry equals about 1.5 mW.
X1
X2
K14
J14
Clk
oscillator
gnd
C3=1uF
VDD=3.3
VDD=3.3
C1=10pF
R1=200K
R2=30K
R3=3K
R4=1K
Tabor
Cstray
VDD=3.3
gnd
C4=1uF
82541GI
B1 step
Содержание 82562EX
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