A-2
FC5A M
ICRO
S
MART
U
SER
’
S
M
ANUAL
FC9Y-B1268
NRS (F)
D, D
D
64
XCHG
D
D
67
TCCST (W)
D
T
66
TCCST (D)
D
T
71
CMP (W, I)
D
D
M
64
CMP (D, L)
D
D
M
67
CMP (F)
D
D
M
80
ICMP>=
D
D
D
M
79
LC (W, I)
D
D
70
LC (D, L)
D
D
76
LC (F)
D
D
86
ADD (W, I)
M + M
D
68
D + D
D
44
0.278 (44) (Note)
ADD (D, L)
M + M
D
80
D + D
D
65
ADD (F)
D + D
D
135 (1 decimal place)
SUB (W, I)
M – M
D
71
D – D
D
60
0.278 (60) (Note)
SUB (D, L)
M – M
D
91
D – D
D
66
SUB (F)
D – D
D
134 (1 decimal place)
MUL (W, I)
M
M
D
61
D
D
D
60
MUL (D, L)
M
M
D
83
D
D
D
76
MUL (F)
D
D
D
104
DIV (W, I)
M ÷ M
D
71
D ÷ D
D
71
DIV (D, L)
M ÷ M
D
98
D ÷ D
D
89
DIV (F)
D ÷ D
D
166
INC (W, I)
49
INC (D, L)
53
DEC (W, I)
49
DEC (D, L)
54
ROOT (W)
D
D
165
ROOT (D)
D
D
228
ROOT (F)
D
D
926
SUM (W, I)
D, D
D
94
SUM (D, L)
D, D
D
96
SUM (F)
D, D
D
165
RNDM
D, D
D
80
ANDW, ORW, XORW (W)
M · M
D, D · D
D
60
Instruction
Device and Condition
Execution Time (µs)
All-in-One Type CPU Module
Slim Type CPU Module
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