7: B
ASIC
I
NSTRUCTIONS
FC5A M
ICRO
S
MART
U
SER
’
S
M
ANUAL
FC9Y-B1268
7-15
CNTD, CDPD, and CUDD (Double-Word Counter)
Three types of double-word counters are available; adding (up) counter CNTD, dual-pulse reversible counter CDPD, and
up/down selection reversible counter CUDD. A total of 128 double-word counters can be programmed in a user program
for any type of CPU module. Each double-word counter uses 2 consecutive devices starting with the allocated device,
which can be C0 through C254. Once used in a user program, counters cannot be used in any other counter instructions.
These instructions are available on upgraded CPU modules with system program version 200 or higher.
Counter
Device Address
Preset Value
CNTD (double-word adding counter)
C0 to C254
Constant:
0 to 4294967295
Data registers:
D0 to D1998
D2000 to D7998
D10000 to D49998
CDPD (double-word dual-pulse reversible counter)
C0 to C254
CUDD (double-word up/down selection reversible counter)
C0 to C254
The valid device range depends on the CPU module type. For details, see pages 6-1 and 6-2.
The preset value can be 0 through 4,294,967,295 and designated using a constant or a data register. If a data register is designated as
the preset value, two consecutive data registers are used.
CNTD (Double-Word Adding Counter)
When double-word adding counter instructions are programmed, two addresses are required. The circuit for a double-
word adding (UP) counter must be programmed in the following order: reset input, pulse input, the CNTD instruction,
and a counter number C0 through C254, followed by a counter preset value from 0 to 4,294,967,295.
The preset value can be designated using a constant or a data register. When a data register is used, the double-word
data of two consecutive data registers becomes the preset value. For 32-bit data storage setting, see page 5-48.
Ladder Diagram
I2
Reset Input I0
ON
OFF
Pulse Input I1
ON
OFF
Counter C0
ON
OFF
Timing Chart
Output Q0
ON
OFF
99998
Input I2
• • •
C0
99999
100000
ON
OFF
CNTD
C0
100000
I1
Reset
Pulse
Instruction
Data
LOD
LOD
CNTD
LOD
AND
OUT
I0
I1
C0
100000
I2
C0
Q0
Program List
I0
Double-word counter instructions use two consecutive
counters, and counters cannot be used more than once in a
user program.
While the reset input is off, the counter counts the leading
edges of pulse inputs and compares them with the preset
value.
When the current value reaches the preset value, the coun-
ter turns output on. The output stays on until the reset input
is turned on.
When the reset input changes from off to on, the current
value is reset.
When the reset input is on, all pulse inputs are ignored.
The reset input must be turned off before counting may
begin.
When power is off, the counter’s current value is held, and
can also be designated as “clear” type counters using Func-
tion Area Settings (see page 5-5).
Counter preset and current values can be changed using
WindLDR without downloading the entire program to the
CPU again. From the WindLDR menu bar, select
Online
>
Monitor
>
Monitor
, then
Online
>
Custom
>
New Custom
Monitor
. To change a counter preset value, select DEC(D) in
the pull-down list box.
When the preset or current value is changed during counter
operation, the change becomes effective immediately.
For the data movement when changing, confirming, and
clearing preset values, see page 7-18.
WindLDR ladder diagrams show CP (counter preset value)
and CC (counter current value) in advanced instruction
devices.
The preset value 0 through 4,294,967,295 can be designated
using a data register D0 through D1998 (all CPU modules) or
D2000 through D7998 and D10000 through D49998 (slim type
CPU modules); then the data of the data registers becomes
the preset value. Directly after the CNTD instruction, the OUT,
OUTN, SET, RST, TML, TIM, TMH, TMS, TMLO, TIMO, TMHO, or
TMSO instruction can be programmed.
CNTD
C28
D5
I1
Reset
Pulse
I0
Q0
Q0
Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: [email protected]
