ICS ELECTRONICS 9099, Инструкция по эксплуатации, Страница: 56 / 178

3-10
3
Status Byte Register. Unwanted conditions can be blocked from generating
SRQs by setting their corresponding enabling bit to a '0'. The enabling bits are
set by writing the value equal to the sum of all of the desired logic 1 bits to
the enabling register. The value is normally decimal but can be expressed in
HEX, OCTAL or BINARY by prefixing the number with a #H, #O or #B.
3.3.2 Event Status Register
The Event Status Register reports events that are common to all 488.2 devices.
This includes events such as selftest errors, command errors, execution errors,
power on and operation complete. The Power-on event occurs at power turn-
on and can be used to signal a power off-on occurrence. The Modbus Error
is included in the Event Status Register. Bit 6 is set when the Modbus Error
Register is loaded with an error value. The 488.2 Operation Complete event
has no meaning for the 9099.
TAbLE 3-1 ESR bIT DEFINITIONS
bit Weight Event Description
7 128 PON The Power-on event occurs at power turn-on and can be used
to signal a power off-on occurrence.
6 64 Modbus Modbus Error detected. Reading the Modbus Error Regis-
Error ter clears this Error bit.
5 32 Cmd Command Error, invalid command or value out of range.
4. 16 Exec Execution Error, command could not be executed.
3 8 Flash Flash configuration data corrupted. Do a CAL:DEFAULT,
check and reload the configuration settings and do a
CAL:DATE <date> command to clear bit 3. User and network
settings lost and may need reloading. If ICS Serial Number
or MAC address is lost, contact ICS Support.
2 4 Query Query error, data not read or read attempt with no data present
to be read.
1 2 - not used
0 1 OPC Operation Complete has no meaning in the 9099.
The Event Status Register is read and cleared with the *ESR? query and cleared
with the *CLS command. Use the *ESE commands to set the Event Status
Enable Register as shown in the following example:
*ESE 60 'enables error bits 2 through 5 for errors
*ESE 124 'enables error bits 2 through 6 for errors
*ESE? 'queries the enabling register setting