Using the Analog Comparator (ACMP) for the QE Microcontrollers
QE128 Quick Reference User Guide, Rev. 1.0
7-2
Freescale Semiconductor
The ACMP interrupt is generated depending how the ACMOD bits are configured in the ACMPxSC
register.
Figure 7-1
shows the moment where the ACMP+ signal crosses the ACMP- signal, producing an
interrupt.
Figure 7-1. ACMP Interrupt Generation
7.2
ACMP project for EVB
7.2.1
Code Example and Explanation
This example code is available from the Freescale Web site www.freescale.com.
The project ACMP.mcp implements the ACMP function selecting a rising- or falling-edge event to trigger
hardware interrupts. The main functions are:
main — Endless loop waiting for the ACMP interrupt to occur.
MCU_Init – MCU initialization, watchdog disable and the ACMP clock module enabled.
GPIO_Init – Configure PTE0 pin as output.
ACMP_Init – ACMP module configuration
ACMP_ISR — Toggles a LED after a rising or falling edge event occurs.
This example consists of comparing two different input voltages using the ACMP module. The ACMP–
is fed with a static voltage which is an internal bandgap and serves as a reference voltage. For more
detailed and specific data about internal reference voltage, please see the QE128 DataSheet. It can be
found at www.freescale.com. An ACMP+ is fed with a variable voltage of 0 to 3 V. Every time the ACMP+
voltage crosses the ACMP– reference voltage, a hardware interrupt is triggered toggling the PTE0 pin.
This pin is connected to a LED.
The code below executes the instructions to disable the watchdog, enable the Reset option and backgroud
pin. The System Option Register 1 (SOPT1). It is used to configure the MCU. The SCGC1 and SCGC2
t
V
ACMP-
ACMP+
Interrupt generated