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QE MCUs 8-bit and 32-bit Comparison

QE128 Quick Reference User Guide, Rev. 1.0

2-6

Freescale Semiconductor

Figure 2-9. Stack Pointer Registers (A7 and OTHER_A7)

Vector base register (VBR) -- This register defines the base address of the exception vector table in the 

memory. It has two different possible values: 0x(00)00_0000 exception 
vector table based on the flash, and 0x(00)80_0000 exception vector table 
based on the RAM. At reset the VBR is cleared. The VBR is located at the 
base of the exception table at the address 0x(00)00_0000 in the flash. 

Figure 2-10. Vector Base Register (VBR)

CPU configuration register (CPUCR) -- With this register you can configure some cores into supervisor 

mode. Certain hardware features can be enabled or disabled based on the 
state of the CPUCR. 

Figure 2-11. CPU Configuration Register

2.2.1.1

Addressing Modes

The ColdFire V1 core counts with 12 different addressing modes. The addressing modes and syntax are 
shown in 

Table 2-3

:

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9

8

7

6

5

4

3

2

1

0

R

Address

W

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9

8

7

6

5

4

3

2

1

0

R 0 0 0 0 0 0 0 0

Base 

Address

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

W

31

30

29

28

27

26

25

24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9

8

7

6

5

4

3

2

1

0

R

ARD IRD IAE IME BWD

0

FSD

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

W

Table 2-3. Addressing Modes and Syntax

Addressing modes

Syntax

Register Direct.

op.sz

1

  Ry,Rx

Address Register Indirect.

op.sz   (Ax),Rx

Address Register Indirect with Post-increment.

op.sz  (Ax)+,Rx

Address Register Indirect Pre-decrement.

op.sz  -(Ay),Rx

Address Register Indirect with Displacement.

op.sz  d16(Ay),Rx

Address Register Indirect with Scaled Index and Displacement.

op.sz  d8(Ay,Xi*SF),Rx

Program Counter Indirect with Displacement.

op.sz d16(PC),Rx

Program Counter Indirect with Scaled Index and Displacement.

op.sz d8(PC,Xi*SF),Rx)

Содержание QE128

Страница 1: ...QE128 Quick Reference User Guide Devices Supported MCF51QE128 MC9S08QE128 Document Number QE128QRUG Rev 1 0 10 2007 ...

Страница 2: ... particular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale Semiconductor data sheets and or specifications can and do vary in different applications and a...

Страница 3: ...utput Comparison 1 19 2 3 7 Development Support Comparison 1 20 2 3 8 Peripherals Comparison 1 20 Chapter 3 How to Load the QRUG Examples 3 1 Overview 1 1 3 2 Steps to programming the MCU using Multilink 1 1 3 3 Steps to programming the MCU Using In Circuit BDM 1 6 Chapter 4 Using the Keyboard Interrupt KBI for the QE Microcontrollers 4 1 Overview 1 1 4 2 KBI project for EVB 1 1 4 2 1 Code example...

Страница 4: ...ardware Inplementation 1 6 Chapter 8 Using the Analog to Digital Converter ADC for the QE Microcontrollers 8 1 Overview 1 1 8 2 ADC project for EVB 1 2 8 2 1 Code Example and Explanation 1 2 8 2 2 Hardware Implementation 1 4 8 3 ADC project for Demo board 1 5 8 3 1 Code Example and Explanation 1 5 8 3 2 Hardware Implementation 1 6 Chapter 9 Using the Real Time Counter RTC for the QE Microcontrolle...

Страница 5: ...ating PWM Signals Using Timer Pulse Width Modulator TPM Module for the QE Microcontrollers 12 1 Overview 1 1 12 2 PWM project for EVB 1 2 12 2 1 Code Example and Explanation 1 2 12 2 2 Hardware Implementation 1 4 12 3 PWM project for Demo board 1 5 12 3 1 Code Example and Explanation 1 5 12 3 2 Hardware Implementation 1 6 Chapter 13 Using the Output Compare function with the Timer Pulse Width Modu...

Страница 6: ...QE128 Quick Reference User Guide Rev 1 0 Freescale Semiconductor 4 14 2 Code Example and Explanation 1 1 14 3 Simulation steps 1 2 14 4 Hardware Implementation 1 7 ...

Страница 7: ...orks with an evaluation board EVB and Demo board with both 8 bit and 32 bit cores versions These examples were developed using CodeWarriorTM 6 0 version Consult the device reference manual for specific part information NOTE The provided examples were made to be used with the MC9S08QE128 and MCF51QE128 in an 80 pin and 64 bit package but could be easily migrated to a different QE device pay attenti...

Страница 8: ...QE Peripheral Module Quick Reference User Guide QE128 Quick Reference User Guide Rev 1 0 1 2 Freescale Semiconductor ...

Страница 9: ...nce manuals at www freescale com 2 2 Cores Comparison 2 2 1 V1 core The MCF51QE128 MCF51QE96 MCF51QE64 are members of the low cost low power high performance ColdFire V1 core version 1 family of 32 bit MCUs Figure 2 1 shows the ColdFire V1 core platform block diagram The ColdFire V1 core features are Implements Instruction Set Revision C ISA_C Supports up to 30 peripheral interrupts and seven soft...

Страница 10: ...on Fetch Cycle FIFO Instruction Buffer Decode Select Operand Fetch Address Generation Execute IFP OEP IAG IC IB DSOC AGEX BDC Debug Flash Array SRAM Array Local Controller RGPIO Controller RGPIO Pins BKGD Bus Platform V1 ColdFire core On Platform Bus Flash Controller RAM Controller Peripheral Bridge Write Data Read Data Address Attributes Peripheral Bus Off Platform Off Platform ...

Страница 11: ...ss registers A0 A6 These registers can be used as software stack pointers index registers or based address registers They can also be used as data operation storage word and longword operations Figure 2 4 Address Registers A0 A6 A7 Is a user stack pointer and is treated specifically by CPU Program counter PC This register contains the address of the currently executing instruction The PC increment...

Страница 12: ... register CCR When it is used in user mode only the lower 8 bit can be accessed When used in supervisor mode the registers can be accessed If a supervisor instruction is executed in user mode it generates a privilege violation exception Figure 2 8 shows the SR behavior in a state machine 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R Address W 7 6 5 4 3 2 1...

Страница 13: ...V C W Figure 2 7 Status Register SR Table 2 2 SR Field Descriptions Field Description 15 T Trace enable When set the processor performs a trace exception after every instruction 14 Reserved must be cleared 13 S Supervisor user state 0 User mode 1 Supervisor mode 12 M Master interrupt state Bit is cleared by an interrupt exception and software can set it during execution of the RTE or move to SR in...

Страница 14: ...core counts with 12 different addressing modes The addressing modes and syntax are shown in Table 2 3 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R Address W 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R 0 0 0 0 0 0 0 0 Base Address 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 W 31 30 29 28 27 26 25 24 23 22 21 20 19 18...

Страница 15: ...a debug or an I O interrupt The ColdFire V1 core uses a reduced version of the interrupt controller from other ColdFire processors This hardware implementation is available only for a 32 bit MCU Absolute Short Addressing op sz xxx w Rx Absolute Long Addressing op sz xxx l Rx Immediate Byte Word op b w 2 imm Rx Immediate Long op l imm3 Rx 1 op sz operand size size is 1 for byte 2 for word 4 for lon...

Страница 16: ...0 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Format FS 3 2 Vector FS 1 0 Status Register Program Counter Figure 2 13 Exception Stack Frame Form Saves a copy of the SR Forces SR S 1 SR T 0 If an interrupt forces the interrupt SR M 0 then sets SR I to the level of Calculates the vector for all internal exceptions For interrupts the CPU uses the vector number supp...

Страница 17: ... 0x12C Next SPI1 76 0x130 Next SCI1_err 77 0x134 Next SCI1_rx 78 0x138 Next SCI1_tx 79 0x13C Next IICx 80 0x140 Next KBIx 81 0x144 Next ADC 82 0x148 Next ACMPx 83 0x14C Next SCI2_err 84 0x150 Next SCI2_rx 85 0x154 Next SCI2_tx 86 0x158 Next RTC 87 0x15C Next TPM3_ch0 88 0x160 Next TPM3_ch1 89 0x164 Next TPM3_ch2 90 0x168 Next TPM3_ch3 91 0x16C Next TPM3_ch4 92 0x170 Next TPM3_ch5 93 0x174 Next TPM...

Страница 18: ...ter which often works together as a 16 bit address pointer where H holds the upper byte of an address and X the lower byte All the indexing addressing mode instructions use the 16 bit register Stack pointer SP This 16 bit address pointer register points to the next available location on the automatic last in first out LIFO The stack is used to automatically store the return address from subroutine...

Страница 19: ...hat evaluates to a 16 bit value page Any label or expression that evaluates to a valid bank number for PPAGE register Any value between 0 and 7 is valid rel Any label or expression that refers to an address that is within 128 to 127 locations from the next address after the last byte of object code for the current instruction A Accumulator V Two s complement Overflow Flag N Negative flag H Half Ca...

Страница 20: ...n though the 32 bit ColdFire V1 core presents improvements in performance These differences are highlighted in the following section The ColdFire V1 architecture features staged pipelining allows the core to process multiple instructions at the same time Store PCL in SP Store X in SP Store PCH in SP Store A in SP Store PCL in SP Store CCR in SP Sets the bit in the CCR Fetches the high order half o...

Страница 21: ...or effective address calculation or the operand fetch cycle Address generation execute cycle AGEX Calculates operand address or executes the instruction ColdFire V1 core architecture Is an orthogonal architecture that has an advantage It has 16 different registers for operation that can be used instead of one The ColdFire V1 core processes more effectively the 32 bit length operations than the 8 b...

Страница 22: ...r efficient handling of 8 bit and 16 bit data Support for up to 32 interrupt reset exceptions Exception priorities are fixed One level of interrupt grouping No hardware support for nesting Support for up to 256 interrupt reset exceptions 39 are used on MCF51QE128 Exception priorities are fixed except for two interrupts that can be remapped Seven levels of interrupt grouping and hardware support fo...

Страница 23: ... 60000 i This rutine is executed 60001 for k 0 k 100 k buffer k k loop forever please make sure that you never leave main Assembly code lines generated for the S08 MCU observe the difference between this assembly code and the assembly code generated from the ColdFire V1 core 10 SOPT1 0x23 Watchdog disable Stop Mode Enable Background Pin enable RESET pin enable 0004 a623 2 LDA 35 0006 c70000 4 STA ...

Страница 24: ...X 002f 6c01 5 INC 1 X 0031 2601 3 BNE L34 abs 0034 0033 7c 4 INC X 0034 L34 0034 9efe01 5 LDHX 1 SP 0037 650064 3 CPHX 100 003a 23d6 3 BLS L12 abs 0012 003c 95 2 TSX 003d 6c03 5 INC 3 X 003f 2602 3 BNE L43 abs 0043 0041 6c02 5 INC 2 X 0043 L43 0043 9efe03 5 LDHX 3 SP 0046 65ea60 3 CPHX 5536 0049 23c3 3 BLS LE abs 000e 16 17 18 19 PTED 0xFF 004b 6eff00 4 MOV 1 _PTED 004e 20b9 3 BRA L9 abs 0009 20 l...

Страница 25: ...pi l 60000 d0 0x0000002A 0x63E2 bls s 28 0x0000000e 19 PTED 0xFF 0x0000002C 0x103C00FF move b 1 d0 0x00000030 0x11C08008 move b d0 0xffff8008 20 loop forever 0x00000034 0x60D4 bra s 42 0x0000000a 0x00000036 0x51FC trapf Table 2 8 shows the CPU cycles needed and the assembly lines code generated to complete the execution of the program described above The used compiler for this test was CW 6 0 vers...

Страница 26: ... Security circuitry to prevent unauthorized access to RAM and FLASH contents default is unsecured when blank Table 2 10 Power Saving mode Comparison MC9S08QE128 MCF51QE128 Two very low power stop modes Stop2 and Stop3 Low Power run LPRun and wait LPWait modes allow for use of peripherals in reduced current and reduced speed mode Peripheral clock enable register can disable clocks to unused modules...

Страница 27: ... properly COP reset with option to run from dedicated 1 kHz internal clock source or bus clock Low voltage detection with reset or interrupt Selectable trip points Illegal opcode detection with reset No illegal address reset all addresses in maps are legal Illegal address detection with reset FLASH Block protection protects in 1k increments Protects array 0 first from 0x0FFFF 0x00000 then array 1 ...

Страница 28: ... breakpoints four PC one address and one data that can be configured into a 1 or 2 level trigger with a programmable response Table 2 16 Peripherals Comparison MC9S08QE128 MCF51QE128 ADC 24 Channel 12 bit resolution 2 5 µs conversion time automatic compare function 1 7 mV C temperature sensor internal bandgap reference channel operation in stop3 and fully functional from 3 6 V to 1 8 V ACMPx Two a...

Страница 29: ... using Code Warrior 6 0 version and can be changed in order to fit the application To run these examples a Code Warrior version 6 0 and an Evaluation Board or a Demo board are needed in order to run these examples satisfactorily 3 2 Steps to programming the MCU using Multilink Follow these simple steps in order to load the QRUG examples and download it to the device The explanation works for the E...

Страница 30: ...the mcp extension file in this case RGPIO mcp 5 To open the file double click on c extension file main c 6 On the left side of the window is a combo box Select the P E Multilink Cyclone Pro option as shown in Figure 3 2 The BDM multilink hardware for programming the MCU is needed when an EVB is used This device is developed by PEmicro If a demo board is used do not buy a multilink ...

Страница 31: ...s to compile the project Click on the make icon beside the combo box as shown in Figure 3 3 The make command can be accessed from the Project menu Make or just press F7 key on your keyboard 8 No errors should show up 9 Project Debug Click on the debug icon beside the make icon or just press F5 on the keyboard Doing this launches the debugger and downloads the program to the MCU flash ...

Страница 32: ...les QE128 Quick Reference User Guide Rev 1 0 3 4 Freescale Semiconductor Figure 3 3 Make Icon and Debug Icon 10 After the debug command is executed a window pops up see Figure 3 4 Click on the Connect option Make Icon Debug Icon ...

Страница 33: ...s asking to erase and program flash click Yes 12 The True time simulator window appears on your screen In this window debug the projects review the registers and memory in real time 13 Click on the run button as shown in Figure 3 5 This figure shows the true time simulator window or debugger window This makes the MCU start to execute the project ...

Страница 34: ...3 5 Run Continue Icon 3 3 Steps to programming the MCU Using In Circuit BDM Follow these simple steps in order to load the QRUG examples and download it to the device The explanation works for EVB only 1 Open CodeWarrior 6 0 2 File Open or click on the Open Icon as shown in Figure 3 6 Start Continue Button ...

Страница 35: ...ctor 3 7 Figure 3 6 Open the Desired Project 3 Browse the desired project 4 Double click on the mcp extension file in this case RGPIO mcp 5 To open the file double click on c extension file main c 6 On the left side of the window is a combo box Select the SofTec option as shown in Figure 3 7 ...

Страница 36: ... to compile the project 8 Click on the make icon beside the combo box as shown in Figure 3 8 The make command can be accessed from the Project menu Make or just press F7 key on your keyboard 9 No errors show up 10 Project Debug Also click on the debug icon beside the make icon or just press F5 on the keyboard Doing this launches the debugger and downloads the program to the MCU flash ...

Страница 37: ...nce User Guide Rev 1 0 Freescale Semiconductor 3 9 Figure 3 8 Make Icon and Debug Icon 11 After the debug command is executed a window pops up see Figure 3 9 select the EVBQE128 hardware model and then click on the Connect option Make Icon Debug Icon ...

Страница 38: ...ppear asking to erase and program flash click Yes 13 The True time simulator window appears on the screen In this window debug the projects review the registers and memory in real time 14 Click on the run button as shown in Figure 3 10 This figure shows the true time simulator window or debugger window This makes the MCU start to execute the project ...

Страница 39: ...How to Load the QRUG Examples QE128 Quick Reference User Guide Rev 1 0 Freescale Semiconductor 3 11 Figure 3 10 Run Continue Icon Start Contin ue button ...

Страница 40: ...How to Load the QRUG Examples QE128 Quick Reference User Guide Rev 1 0 3 12 Freescale Semiconductor ...

Страница 41: ...eb site www freescale com KBIxSC KBF KBACK KBIE KBMOD Module Configuration KBF set when event occurs KBACK clears KBF KBI Quick Reference KBIxPE KBIPE7 KBIPE6 KBIPE5 KBIPE4 KBIPE3 KBIPE2 KBIPE1 KBIPE0 KBI Pin Enable KBIPE 7 0 enables and disables each port pin to operate as a keyboard interrupt pin KBIxES KBEDG7 KBEDG6 KBEDG5 KBEDG4 KBEDG3 KBEDG2 KBEDG1 KBEDG0 KBI Pin Enable KBEDG 7 0 determines t...

Страница 42: ... the other peripherals are disabled void MCU_Init void SOPT1 0x23 Watchdog disable Stop Mode Enable Background Pin enable RESET pin enable SCGC1 0x00 Disable Bus clock to unused peripherals SCGC2 0x10 Bus Clock to the KBI module is enabled This is the General Purpose Input Output configuration These code lines configure the direction for the PTE port Eight LEDs from the EVB are connected to the PT...

Страница 43: ... time an interrupt is detected this routine toggles a LED The VectorNumber_Vkeyboard can be replaced by the interrupt vector number This depends if the MCU is a 9S08 or V1 Using this example makes the code fully compatible for either MCU void interrupt VectorNumber_keyboard KBI_ISR void KBI interrupt vector number 18 S08 KBI interrupt vector number 80 V1 KBI2SC_KBACK 1 Clear the KBI interrupt flag...

Страница 44: ...nstall A push button a resistor and a capacitor are used to build the circuit Figure 4 1 shows the hardware configuration Figure 4 1 EVB KBI Hardware Implementation NOTE This example is developed using the CodeWarrior IDE version 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE128 and MC9S08QE128 80 pin package There may be changes needed in the code to initialize another MCU...

Страница 45: ...s generated This is the General Purpose Input Output configuration These code lines configure the direction for the PTC port Only six LEDs from the demo board are connected to the PTC port The other two LEDs are connected to the E port In this example only PTC0 is configured as output in order to drive a LED The demo board does not count with any pull ups therefore the internal pull up is enabled ...

Страница 46: ...tine toggles a LED The VectorNumber_Vkeyboard can be replaced by the interrupt vector number this depends if the MCU is a 9S08 or V1 Using this example makes the code fully compatible for either MCU void interrupt VectorNumber_Vkeyboard KBI_ISR void KBI1SC_KBACK 1 Clear the KBI interrupt flag PTCD_PTCD0 1 Toggles PTC0 4 3 2 Hardware Implementation This project was developed using the DEMOQE board ...

Страница 47: ...on 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE128 and MC9S08QE128 64 pin package There may be changes needed in the code to initialize another MCU Figure 4 2 shows the hardware connections used for the KBI project for detailed information about the MCU supply voltages needed please refer to the Pins and Connections chapter in the Reference Manual MC9S08QE128 or MCF51QE12...

Страница 48: ...Using the Keyboard Interrupt KBI for the QE Microcontrollers QE128 Quick Reference User Guide Rev 1 0 4 8 Freescale Semiconductor ...

Страница 49: ...e main Endless loop toggling a LED MCU_Init MCU initialization watchdog disable GPIO_Init Configure PTE0 pin as output ICS1 CLKS RDIV IREFS IRCLKEN IREFSTEN CLKS Clock Source Select IRCLKEN Internal Reference Clock Enable RDIV Reference Divider IREFSTEN Internal Reference Stop Enable IREFS Internal Reference Select ICS2 BDIV RANGE HGO LP EREFS ERCLKEN EREFSTEN BDIV Bus Frequency Divider EREFS Exte...

Страница 50: ...abled Background Pin enabled RESET pin enabled SCGC1 0x20 Bus to TPM1 peripheral is enabled SCGC2 0x00 All clocks to peripherals are disabled This is the General Purpose Input Output configuration These code lines configure the directions for the PTE port Only one LED is connected to the PTE port therefore the PTE0 pin is configured as output void GPIO_Init void PTEDD 0x01 Configure PTE port as ou...

Страница 51: ...nfigures the MCU in the selected clock mode The clock frequency can be seen on the PTE0 pin void main void MCU_Init Function that initializes the MCU GPIO_Init Function that initializes the Ports of the MCU ICS_Init Function that initializes the ICS module EnableInterrupts interrupts are enabled for PTED_PTED0 1 Toggle PTE0 Delay loop forever please make sure that you never leave this function The...

Страница 52: ...ing an oscilloscope in the TPM1CH0 pin of the MCU The obtained frequency is the bus frequency divided by 1000 void BUSCLK_DividedBy1000 void TPM1SC 0x08 TPM1 clock source Bus clock TPM1C0SC 0x28 PWM is edge aligned PWM toggles from high to low TPM1MOD 1000 PWM period bus clock 1000 TPM1C0V 500 PWM duty cycle 50 5 3 Hardware Implementation This project is developed using the EVBQE128 STARTER KIT No...

Страница 53: ...on 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE128 and MC9S08QE128 80 pin package There may be changes needed in the code to initialize another MCU Figure 5 2 shows the hardware connections used for the ICS project for detailed information about the MCU hardware needed please refer to the Pins and Connections chapter in the Reference Manual MC9S08QE128 or MCF51QE128 It ca...

Страница 54: ...Using the Internal Clock Source ICS for the QE Microcontrollers QE128 Quick Reference User Guide Rev 1 0 5 6 Freescale Semiconductor ...

Страница 55: ...ftware to distinguish the register that is on IIC1 or IIC2 This register contains the slave address to be used by the IIC module ModBUSY Bus Busyule Configuration Data Register 6 2 Code Example and Explanation This example codes for the Master and Slave project is available from the Freescale Web site www freescale com IICxA AD7 AD6 AD5 AD4 AD3 AD2 AD1 IICxF MULT ICR MULT IIC Multiplier Factor CR ...

Страница 56: ... Reset option and background pin The System Option Register 1 SOPT1 is used to configure the MCU The SCGC1 and SCGC2 are registers used to save power consumption here the bus clock to peripherals can be enabled or disabled In this example only the bus clock to the IIC module is active The clocks to other peripherals are disable void MCU_Init void SOPT1 0x23 Watchdog disable Stop Mode Enable Backgr...

Страница 57: ...er void main void MCU_Init Function that initializes the MCU GPIO_Init Function that initializes the Ports of the MCU IIC_Init Function that initializes the IIC module EnableInterrupts enable interrupts for Delay 60000 PTED counter counter if PTHD_PTHD7 0 while PTHD_PTHD7 0 Wait while pin is low while IIC2C1_MST 1 Wait until IIC is stopped MasterTransmit 1 1 Initialize to Transmit else while IIC2C...

Страница 58: ...low the slave logic For a better understanding refer to Typical IIC Interrupt Routine figure from the Reference Manual The VectorNumber_Viicx can be replaced by the interrupt vector number this depends if the MCU is S08 or V1 Using this example makes the code fully compatible for either MCU interrupt VectorNumber_iicx void IIC_ISR void IIC interrupt vector number 17 S08 IIC interrupt vector number...

Страница 59: ...d_and_Store else Slave if IIC2S_ARBL IIC2S_ARBL 1 if IIC2S_IAAS Check For Address Match count 0 SRW else if IIC2S_IAAS Arbitration not Lost count 0 SRW else if IIC2C1_TX Check for rec ACK if IIC2S_RXAK ACK Recieved IIC2D IIC_TX_Data count count else IIC2C1_TX 0 IIC2D else Slave_Read_and_Store This function is used to initialize the transfer process Some variables are initialized The master bit MST...

Страница 60: ...e initialized and the MST bit is set to generate a start void Master_Receive rec_count 0 last_byte_to_rec 0 last_byte 0 count 0 num_to_rec 0 IIC2C1_TXAK 0 IIC2C1_TX 1 Set TX bit for Address cycle IIC2C1_MST 1 Set Master Bit to generate a Start add_cycle 1 This variable sets up a master rec in the ISR IIC2D 0xAB Send Address data LSB is R or W for Slave 6 2 2 IIC Slave Project This project is simil...

Страница 61: ... the first byte of the array is used void Slave_Read_and_Store void if rec_count num_to_rec last_byte_to_rec 2 IIC_Rec_Data rec_count IIC2D rec_count if rec_count num_to_rec rec_count 0 6 3 Hardware Implementation This project is developed using the EVBQE128 STARTER KIT No extra hardware is needed Two resitors are needed for the protocol to work properly For this example 2 MCUs are connected Figur...

Страница 62: ...Using the Inter Integrated Circuit IIC for the QE Microcontrollers QE128 Quick Reference User Guide Rev 1 0 6 8 Freescale Semiconductor Figure 6 1 IIC Hardware Implementation ...

Страница 63: ...Warrior IDE version 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE128 and MC9S08QE128 80 pin package There may be changes needed in the code to initialize another MCU Figure 6 1 shows the hardware connections used for the IIC project for detailed information of the MCU hardware needed please refer to the Pins and Connections chapter in the Reference Manual ...

Страница 64: ...Using the Inter Integrated Circuit IIC for the QE Microcontrollers QE128 Quick Reference User Guide Rev 1 0 6 10 Freescale Semiconductor ...

Страница 65: ...device In the register name below where there s a small x there would be a 1 or a 2 in the software to distinguish the register that is on an ACMP1 or an ACMP2 Module Configuration The ACMPx module has two analog inputs named ACMPx and ACMPx and one digital output named ACMPxO The ACMPx serves as a non inverting analog input and the ACMPx serves as an inverting analog input ACMPxO serves as digita...

Страница 66: ...og disable and the ACMP clock module enabled GPIO_Init Configure PTE0 pin as output ACMP_Init ACMP module configuration ACMP_ISR Toggles a LED after a rising or falling edge event occurs This example consists of comparing two different input voltages using the ACMP module The ACMP is fed with a static voltage which is an internal bandgap and serves as a reference voltage For more detailed and spec...

Страница 67: ...ion uses the ACMP2 module The internal bandgap is selected and this voltage is compared with the PTC7 pin voltage void ACMP_Init void ACMP2SC 0xC3 ACMP module enable Internal reference selected Comparator output rising or falling edge This is the main function above are the described called functions and all the interrupts are enabled After this the analog comparator interrupt can be serviced void...

Страница 68: ...otentiometer POT is connected to 3 3 V and the other terminal is connected to the ground When the POT varies the voltage in the center pin change This pin is the input for the PTC7 pin Figure 7 2 shows the hardware configuration Figure 7 2 ACMP Hardware Implementation NOTE This example is developed using the CodeWarrior IDE version 6 0 for the HCS08 and V1 families It is expressly made for the MCF...

Страница 69: ... selecting a rising or falling edge event to trigger hardware interrupts The main functions are main Endless loop waiting for the ACMP interrupt to occur MCU_Init MCU initialization watchdog disable and the ACMP clock module enabled GPIO_Init Configure PTC0 pin as output ACMP_Init ACMP module configuration ACMP_ISR Toggles a LED after a rising or falling edge event occurs This is the General Purpo...

Страница 70: ... connected to 3 3 V and the other terminal is connected to the ground In this configuration when POT varies the voltage in the center pin changes this pin is the input for PTC7 pin Figure 7 3 shows the hardware configuration Figure 7 3 ACMP Hardware Implementation NOTE This example is developed using the CodeWarrior IDE version 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE...

Страница 71: ...rnal reference voltage The analog comparator circuit is designed to operate across a full range of supply voltage Please refer to the data sheet of the device You can also find it at www freescale com Figure 7 3 shows the hardware connections used for the ACMP project for detailed information about the MCU supply voltages needed please refer to the Pins and Connections chapter the Reference Manual...

Страница 72: ...Using the Analog Comparator ACMP for the QE Microcontrollers QE128 Quick Reference User Guide Rev 1 0 7 8 Freescale Semiconductor ...

Страница 73: ...QE128 It can be found at www freescale com Module configuration Module configuration Result of ADC conversion Result of ADC conversion Compare value ADCSC1 COCO AIEN ADCO ADCH ACME conversion complete flag ADCO continuous conversion enable AIEN Interrupt enable ADCH output pin enable ADCSC2 ADACT ADTRG ACFE ACFGT ADACT conversion active ADTRG conversion trigger select ACFE compare function enable ...

Страница 74: ...e interrupt based approach 8 bit resolution and continuous sample mode The zip file contains the following functions main Endless loop waiting for the ADC interrupt to occur ADCV7 ADCV0 contains the lower eight bits of the 12 bit 10 bit or 8 bit compare value ADCCFG ADLPC ADIV ADLSMP MODE ADICLK ADLPC Low Power configuration MODE Conversion mode Selection ADIV Clock divide select ADICLK Input cloc...

Страница 75: ...it void SOPT1 0x23 Watchdog disabled Stop Mode Enabled Background Pin enabled RESET pin enabled SCGC1 0x10 Bus Clock to the ADC module is enabled SCGC2 0x00 Disable Bus clock to unused peripherals This is the General Purpose Input Output configuration These code lines configure the directions for the PTE port The eight LEDs are connected to the PTE port therefore the PTE port is configured as outp...

Страница 76: ...ime an interrupt is detected this routine displays the converted value in PTE port The VectorNumber_Vadc can be replaced by the interrupt vector number this depends if the MCU is S08 or V1 Using this example makes the code fully compatible for either MCU void interrupt VectorNumber_Vadc ADC_ISR void ADC vector address 19 S08 ADC vector address 81 V1 PTED ADCRL Move the adquired ADC value to PTE po...

Страница 77: ...nd the ADC clock module enabled GPIO_Init Configure PTC0 to PTC5 PTE6 and PTE7 as as outputs ADC_Init ADC module configuration ADC_ISR The data obtained by the ADC module is displayed on PTC0 to PTC5 pins PTE6 and PTE7 pins This is the General Purpose Input Output configuration These code lines configure the direction for the PTC port Only six LEDs from the demo board are connected to the PTC port...

Страница 78: ...e display on the LEDs The LEDs turn on with 0 s PTED UINT8 temp 0xC0 Move the adquired ADC value to port E PTCD UINT8 temp 0x3F Move the adquired ADC value to port C 8 3 2 Hardware Implementation Figure 8 2 ADC Hardware Implementation NOTE This example is developed using the CodeWarrior version 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE128 and MC9S08QE128 64 pin package...

Страница 79: ...ference User Guide Rev 1 0 Freescale Semiconductor 8 7 Figure 8 2 shows the hardware connections used for the ADC project for detailed information about the MCU hardware needed please refer to the Pins and Connections chapter in the Reference Manual It can be found at www freescale com ...

Страница 80: ...Using the Analog to Digital Converter ADC for the QE Microcontrollers QE128 Quick Reference User Guide Rev 1 0 8 8 Freescale Semiconductor ...

Страница 81: ...ere are different periods of time that can be used to interrupt the MCU Please refer the reference manual for specific times It can be found at www freescale com RTC Quick Reference Module Configuration 9 2 RTC project for EVB 9 2 1 Code Example and Explanation This example code is available from the Freescale Web site www freescale com The zip file contains the following functions main Endless lo...

Страница 82: ...e PTE ports The eight LEDs are connected to the PTE port therefore the PTE port is configured as output void GPIO_Init void PTEDD 0xFF Configure PTE port as output PTED 0x00 Put 0 s in PTE port This is the initialization code for the Real Time clock module used for the QE MCU This application generates an interrupt every second Within the interrupt service routine a PTE port is toggled void RTC_In...

Страница 83: ...rdware Implementation NOTE This example is developed using the CodeWarrior IDE version 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE128 and MC9S08QE128 80 pin package There may be changes needed in the code to initialize another MCU Figure 9 1 shows the hardware connections used for the RTC project for detailed information about the MCU hardware needed please refer to the ...

Страница 84: ...pin This is the general purpose Input Output GPIO configuration These code lines configure the direction for the PTC port Only six LEDs from the demo board are connected to the PTC port The others two LEDs are connected to port E In this example PTC0 is configured as output in order to drive a LED void GPIO_Init void PTCDD 0x01 Configure PTC0 as output PTCD 0x01 Put 1 in PTC0 to turn off the LED N...

Страница 85: ...onductor 9 5 9 3 2 Hardware Implementation Figure 9 2 RTC Hardware Implementation NOTE This example is developed using the CodeWarrior IDE version 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE128 and MC9S08QE128 64 pin package There may be changes needed in the code to initialize another MCU ...

Страница 86: ...ce User Guide Rev 1 0 9 6 Freescale Semiconductor Figure 9 2 shows the hardware connections used for the RTC project for detailed information about the MCU hardware needed please refer to the Pins and Connections chapter in the Reference Manual It can be found at www freescale com ...

Страница 87: ... SCI module is displayed on the PTE port and the character 1 is sent by SCI The following example describes the initialization code for the SCI module This example configures the serial communications interface at 9600bps in an 8 bit mode The MCU waits for an interrupt once an interrupt is detected the received data is displayed on the PTE port and then the character 1 is sent by SCI The SCI modul...

Страница 88: ...0 Disable all errors interrupts SCI1BDL 0x1A This register and the SCI1BDH are used to configure the SCI baud rate SCI1BDH 0x00 BUSCLK 4MHz Baud rate 9600bps SBR12 SBR0 x 16 26 x 16 This is the main function the above described functions are called and all the interrupts are enabled The SCI_Rx interrupt can be detected void main void MCU_Init Function that initializes the MCU GPIO_Init Function th...

Страница 89: ... MCF51QE128 and MC9S08QE128 80 pin package There may be changes needed in the code to initialize another MCU Figure 10 1 shows the hardware connections used for the SCI project for detailed information about the MCU power supply please refer to the Pins and Connections chapter in the Reference Manual It can be found at www freescale com The SCI mcp project needs to work with the hyperterminal prog...

Страница 90: ...re connected to the PTC port The other two LEDs are connected to the E port In this example PTC0 to PTC5 and PTE6 PTE7 are configured as outputs in order to drive LEDs void GPIO_Init void PTCDD UINT8 PTCD 0x3F Configure PTC0 PTC5 as outputs PTEDD UINT8 PTED 0xC0 Configure PTE6 and PTE7 pins as outputs PTCD 0x3F Put 1 s in port C in order to turn off the LEDs PTED 0xC0 Put 1 s in port E port in ord...

Страница 91: ...made for the MCF51QE128 and MC9S08QE128 64 pin package There may be changes needed in the code to initialize another MCU Figure 10 2 shows the hardware connections used for the SCI project for detailed information about the MCU power supply please refer to the Pins and Connections chapter in the Reference Manual It can also be found at www freescale com The SCI mcp project needs to work with the h...

Страница 92: ... the Serial Communications Interface SCI for the QE Microcontrollers QE128 Quick Reference User Guide Rev 1 0 10 6 Freescale Semiconductor 1 stop bit No flow control Press any key and the character 1 appears ...

Страница 93: ... that are on SPI1 from those on SPI2 Module configuration Module configuration Data buffer 11 2 SPI project for EVB 11 2 1 Code Example and Explanation This example code for Master and Slave project is available from the Freescale Web site www freescale com SPIxC1 SPIE SPE SPTIE MSTR CPOL CPHA SSOE LSBFE SPIE SPI Interrupt Enable CPOL Clock Polarity SPE SPI system Enable CPHA Clock Phase SPTIE SPI...

Страница 94: ...ls can be enabled or disabled In this example only the bus clock to the SPI2 module is active The clocks to the other peripherals are disabled void MCU_Init void SOPT1 0x23 Watchdog disable Stop Mode Enable Background Pin enable RESET pin enable SCGC1 0x00 Disable Bus clock to unused peripherals SCGC2 0x02 Bus Clock to the SPI2 module is enabled This is the General Purpose Input Output configurati...

Страница 95: ...mit buffer is empty PTDD_PTDD3 0 Slave Select set in low SPI2D counter Put in SPI buffer a data to send PTED counter Display the counter value on LEDs counter Increment counter loop forever please make sure that you never leave this function NOTE This is the SPI interrupt service routine This routine is used when a byte is sent by the slave to the master void interrupt VectorNumber_Vspi2 SPI_ISR v...

Страница 96: ...or and the highest baud rate divisor SPI2C1 0xC4 SPI Interrupt enable system enable and slave mode selected SPI2C2 0x00 Different pins for data input and data output NOTE This is the SPI interrupt service routine This routine is used when a byte is sent by the master to the slave void interrupt VectorNumber_Vspi2 SPI_ISR void UINT8 temp buffer while PTDD_PTDD0 temp SPI2S Clear register flag buffer...

Страница 97: ...g the Serial Peripheral Interface SPI for the QE Microcontrollers QE128 Quick Reference User Guide Rev 1 0 Freescale Semiconductor 11 5 11 2 2 Hardware Implementation Figure 11 1 SPI Hardware Implementation ...

Страница 98: ...6 and PTE7 pins as outputs configure PTD4 as output signal SPI_Init SPI module configuration SPI_ISR Clear module flags This is the General Purpose Input Output configuration These code lines configure the pin directions for the PTD port The SPI protocol can communicate various slaves with one master To communicate with a specific slave the signal must be low The PTD3 pin is configured as output a...

Страница 99: ...I clock module enabled GPIO_Init Configure PTE port as output SPI_Init SPI module configuration SPI_ISR Display the received data in eight LEDs The firmware for this project is much similar to SPI_master project The differences are that the device is configured as slave and only Receives a byte and displays it on the PTE port This is the initialization code for Serial Peripheral Interface module u...

Страница 100: ... Peripheral Interface SPI for the QE Microcontrollers QE128 Quick Reference User Guide Rev 1 0 11 8 Freescale Semiconductor For detailed information about the code refer to the SPI_Slave project from the QRUG examples ...

Страница 101: ...g the Serial Peripheral Interface SPI for the QE Microcontrollers QE128 Quick Reference User Guide Rev 1 0 Freescale Semiconductor 11 9 11 3 2 Hardware Implementation Figure 11 2 SPI Hardware Implementation ...

Страница 102: ...n 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE128 and MC9S08QE128 64 pin package There may be changes needed in the code to initialize another MCU Figure 11 2 shows the hardware connections used for the SPI project for detailed information about the MCU hardware needed please refer to the Pins and Connections chapter in the Reference Manual It can be found at www freescal...

Страница 103: ...to distinguish the registers that are on TPM1 from those on TPM2 or from TPM3 A small n in a register name below is a place holder for the channel number Module configuration TPMxSC TOF TOIE CPWMS CLKSB CLKSA PS2 PS1 PS0 TOF Timer Overflow Flag CLKS B A Clock Source Select TOIE Timer Overflow Interrupt Enable PS 2 0 Prescale Divisor Select CPWMS Center Aligned PWM Select TPMxCNTH Bit 15 14 13 12 1...

Страница 104: ...or power saving consumption here the bus clock to peripherals can be enabled or disabled In this example only the bus clock to the TPM module is active The other peripheral clocks are disabled void MCU_Init void SOPT1 0x23 Watchdog disable Stop Mode Enable Background Pin enable RESET pin enable SCGC1 0x20 Bus Clock to the TPM1 module is enabled SCGC2 0x00 Disable Bus clock to unused peripherals Th...

Страница 105: ...5 PTB5 is the PWM output so this output is display in the PTE0 This is made only for didactic purposes loop forever please make sure that you never leave this function NOTE This is the TPM service routine Every time a TPM interrupt is detected the PWM duty cycle is incremented by 1 When the value of the register reaches 0x00F0 the compare value is reset to one void interrupt VectorNumber_Vtpm1ch1 ...

Страница 106: ...0 12 4 Freescale Semiconductor 12 2 2 Hardware Implementation Figure 12 1 PWM Hardware Implementation NOTE This example is developed using the CodeWarrior IDE version 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE128 and MC9S08QE128 80 pin package There may be changes needed in the code to initialize another MCU ...

Страница 107: ...the described called functions and all the interrupts are enabled The TPM interrupt can then be detected Within the endless loop the PWM output value is displayed which is in the PTE0 void main void MCU_Init Function that initializes the MCU GPIO_Init Function that initializes the Ports of the MCU TPM_Init Function that initializes the TPM module EnableInterrupts enable interrupts for PTEC_PTCD0 P...

Страница 108: ...le is developed using the CodeWarrior IDE version 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE128 and MC9S08QE128 64 pin package There may be changes needed in the code to initialize another MCU Figure 12 2 shows the hardware connections used for the PWM project for detailed information about the MCU hardware needed please refer to the Pins and Connections chapter in the ...

Страница 109: ...re to distinguish the registers that are on TPM1 from those on TPM2 or from TPM3 A small n in a register name below is a place holder for the channel number Module configuration TPMxSC TOF TOIE CPWMS CLKSB CLKSA PS2 PS1 PS0 TOF Timer Overflow Flag CLKS B A Clock Source Select TOIE Timer Overflow Interrupt Enable PS 2 0 Prescale Divisor Select CPWMS Center Aligned PWM Select TPMxCNTH Bit 15 14 13 1...

Страница 110: ... registers used for power consumption save where the bus clock to peripherals can be enable or disable In this example only the bus clock to the TPM module is active the others peripheral clocks are disable void MCU_Init void SOPT1 0x23 Watchdog disable Stop Mode Enable Background Pin enable RESET pin enable SCGC1 0x80 Bus Clock to the TPM3 module is enabled SCGC2 0x00 Disable Bus clock to unused ...

Страница 111: ...Ports of the MCU TPM_Init Function that initializes the TPM module EnableInterrupts enable interrupts for loop forever please make sure that you never leave this function NOTE This is the Timer Pulse Width Modulator service routine Every time an TPM interrupt is detected the PTE0 pin is toggle The interrupt will be generated when the counter counts up to 0xFFFF after whis an interrupt will be gene...

Страница 112: ...ation NOTE This example was developed using the CodeWarrior IDE version 6 0 ALPHA 2 for the HCS08 and V1 family and was expressly made for the MCF51QE128 and MC9S08QE128 80 pin package There may be changes needed in the code to initialize another MCU The Figure 13 1 shows the hardware connections used for the TPM project for detailed information about the MCU needed hardware please refer to Pins a...

Страница 113: ... Input Output configuration this code lines configure the direction for PTC port Only six LEDs from demo board are connected to PTC port the others two LEDs are connected to port E In this example PTC0 to PTC6 PTE6 and PTE7 are configured as outputs in order to drive LEDs void GPIO_Init void PTCDD UINT8 PTCD 0x3F Configure PTC0 PTC6 as outputs PTEDD UINT8 PTED 0xC0 Configure PTE6 and PTE7 pins as ...

Страница 114: ...ation NOTE This example was developed using the CodeWarrior IDE version 6 0 ALPHA 2 for the HCS08 and V1 family and was expressly made for the MCF51QE128 and MC9S08QE128 80 pin package There may be changes needed in the code to initialize another MCU The Figure 13 2 shows the hardware connections used for the TPM project for detailed information about the MCU needed hardware please refer to Pins a...

Страница 115: ...ation The following firmware describes the initialization code for the RGPIO module This example shows the difference using normal GPIO and Rapid GPIO The differences are shown in the True Time Simulator window and is explained further in this document This part of the code is the MCU initialization These instructions disable the watchdog enable the Reset option and backgroud pin The System Option...

Страница 116: ...the RGPIO module and the toggle instruction is executed in 2 CPU cycles 2 ASM instructions void main void MCU_Init Function that initializes the MCU GPIO_Init Function that initializes the Ports of the MCU RGPIO_Init Function that initializes the RGPIO module EnableInterrupts enable interrupts for PTED_PTED3 1 Toggles a PTE3 This C command line is executed in 18 CPU cycles PTED 0x01 Toggles a PTE0...

Страница 117: ...ose I O RGPIO for the MCF51QE128 Microcontrollers QE128 Quick Reference User Guide Rev 1 0 Freescale Semiconductor 14 3 Figure 14 1 Step 1 2 Go to code line PTED_PTED3 1 Right click and select Set Breakpoint option See next figure ...

Страница 118: ...trollers QE128 Quick Reference User Guide Rev 1 0 14 4 Freescale Semiconductor Figure 14 2 Step 2 3 Go to code line PTED 0x01 Right click and select Set Breakpoint option 4 Put a break point in code line RGPIO_TOG 0x0080 The break points should be as the figure shows it ...

Страница 119: ...onductor 14 5 Figure 14 3 Step 4 5 Click on the Start Continue button or just press F5 key on the keyboard 6 In the the assembly window the blue squeare shows the instruction that has been executed The first red arrow is a breakpoint from the Source window and corresponds to the first red arrow from the Assembly window See next figure ...

Страница 120: ...CF51QE128 Microcontrollers QE128 Quick Reference User Guide Rev 1 0 14 6 Freescale Semiconductor Figure 14 4 Step 6 7 Press Ctrl F11 on the keyboard or click on assembly step button and observe the executed assembly instruction from each C command line ...

Страница 121: ...loped using the CodeWarrior IDE version 6 0 for the HCS08 and V1 families It is expressly made for the MCF51QE128 and MC9S08QE128 80 pin package There may be changes needed in the code to initialize another MCU Figure 14 5 shows the hardware connections used for the RGPIO project for detailed information about the MCU hardware needed please refer to the Pins and Connections chapter in the Referenc...

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