Fluke 2680A, Руководство по обслуживанию

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268XA
Service Manual
2-24
Active Filter (ACV Filter)
The active filter is used only for V ac measurements to filter out the ac ripple and noise
present on the output of the RMS converter. The filter uses an op-amp internal to the
Stallion Chip, resistors A3R102, A3R103, and A3R104, capacitors A3C57, A3C58, and
A3C59. A3Q6 turns on to discharge the capacitors between measurements.
Voltage Reference Circuit
The voltage reference circuit creates a well-reg3.45/-3.45 V dc source for use by
the A/D converter, and as a source for ohms and current measurements. The circuit is
formed around two dual op-amps A3U12 and A3U20. A3U12 controls balance between
+3.45 V dc and -3.45 V dc by adjusting the +3.45 V dc through A3Q2 as the divider
between these voltages in resistor pack A3Z1 reads above or below zero. The other half
of A3U12 adjusts the absolute voltage difference between the two outputs by regulating
the -3.45 V dc so as to produce zero collector-base volts on A3Q5. If the collector voltage
rises, then A3Q5 needs more current, which is produced by lowering the -3.45 V dc
through A3Q3. Resistor A3R101 and capacitor A3C48 stabilize the loop.
A3U20 is also a dual op-amp. One half provides the regulated 3 mA required to flow into
the cathode of the zener diode within A3Q5 by forming a current source with A3Q4. If
not supplied from a current source, the current would change with the emitter base
voltage of A3Q5. The current source is best visualized as a differential amp sensing both
sides of A3R83 and nulling this against the reference voltage. The other side of A3Q20
establishes a reference voltage of 0.493 V dc above the collector of A3Q5 so that the
selected resistors A3R64 and A3R65 provide the required current. When A3Q5 is tested,
it has a collector current specified for zero TC. This current is converted into resistor
values, but requires a known voltage differential to operate properly.
Analog/Digital Converter Circuit
The A/D converter consists of a gate array for control, switches for directing currents,
and a reference circuit and reference resistors for providing the currents. The various
currents are integrated across capacitor A3C44, and the zero crossing is detected by
comparator A3U11 and a logic signal returned to the FPGA (Field Programmable Gate
Array). The FPGA contains counters that count the amount of time that the reference
currents are applied to the integrator. The input voltage is proportional to the difference
in the time required of positive and negative reference currents to null the applied input.
The a/d produces about +35,000 counts for +3 V dc. It has linear behavior up to 3.4 V dc.
This gives a resolution of about 88
µ
V in the fast measurement mode.
The measurement cycle consists of four basic periods as shown in Table 2-7. This gives a
total measurement time of 833.533
µ
s. A brief explanation of each state follows. For
additional information, refer to “A1 Main to A3 A/D Converter Communications” later in
this chapter.
Autozero
Autozero is the state the a/d idles in when not in use. In this state, the signals PREF,
NREF, DREF, and INT are all low. The purpose of the state is to remove any remaining
charge on A3C44, to charge A3C60 to a voltage so that pin 6 of A3U19 is at zero, and to
provide time to return data to the microprocessor. In this state, the input is not connected,
A3R94 and A3R95 ground the input, A3U19 produces an error signal, which is amplified
by the other halve of A3U19, providing feedback to produce a nulling voltage at A3C60.
A3C60 stays charged to this voltage until another cycle is initiated.