Fluke 2680A, Руководство по обслуживанию

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Diagnostic Testing and Troubleshooting
Troubleshooting the Device
6
6-41
Digital Input Buffers
The Digital Input Threshold circuit sets the input threshold level for the Digital Input
Buffers and the Totalizer Input. A fixed value voltage divider (R5, R6) and a unity gain
buffer amplifier (U1) are the main components in the circuit. The voltage from the
divider (approxi1.4 V dc) is then buffered by U1, which sets the input threshold.
Capacitor C8 filters the divider voltage at the input of U1.
The 20 Digital Input Buffers are identical in design but only components used for Digital
Input 0 are referenced in this description. If the Digital Output Driver (U13 Pin 13) is
“off”, the input to the Digital Input Buffer is determined by the voltage level at P6 Pin
A1. If the Digital Output Driver is “on”, the input of the Digital Input Buffer is the
voltage at the output of the Digital Output Driver.
The Digital Input Threshold circuit and resistor network Z2 determine the input threshold
voltage and hysteresis for inverting comparator U8. The input threshold of +1.4 V dc and
a hysteresis of +0.5 V dc are used for all Digital Input Buffers. When the input of the
Digital Input Buffer is greater than approxi1.65 V dc, the output of the inverting
comparator is low. When the input then drops below about +1.15 V dc, the output of the
inverting comparator goes high.
Digital Output Drivers
Since the 20 Digital Output Drivers are identical in design, the following example
description references only the components that are used for the Digital Output (DO<0>).
The Microprocessor controls the state of the Digital Output Driver DO<0> by setting the
level of the output U4 Pin 59. When U4 Pin 59 is set high, the output of the open-
collector Darlington driver (U13 Pin 13) sinks current through current-limiting resistor
R80. When U4 Pin 59 is set low, the driver output turns off and is pulled up by Z4 and/or
the voltage of the external device that the output is driving.
Relay Output Drivers
Since the 8 Relay Output Drivers are identical in design , the following example
description references only the components that are used for the operation of K1. The
output relays are latching relays and therefor must be set/reset individually. The
Microprocessor controls the state of the Digital Output Driver DO<20> by setting the
level of the output U4 Pin 67. When U4 Pin 67 is set high, the output of the open-
collector Darlington driver (U10 Pin 10) sinks current through the K1 Set relay coil; the
internal flyback diode (U10 Pin 9) conducts the energy into Vcc to minimize overshoot.
When U4 Pin 68 is set high, the output of the open-collector Darlington driver (U10 Pin
11) sinks current through the K1 Reset relay coil; the internal flyback diode (U10 Pin 9)
conducts the energy into Vcc again to minimize overshoot. K1 is a latching double pole,
double throw relay. The relay is configured in a parallel-ganged configuration; when the
relay is closed, P5 Pin B30 will be connected to P5 Pin C29 and P5 Pin B32 will be
connected to P5 Pin C31. Fuses F1 and F5 (2A) protect the relay contacts from excessive
current. Check continuity when the relay is closed. It should not exceed a few ohms.