Theory of Operation
Introduction
2
2-9
This particular series of devices is presently available in 2 other sizes, 8 MB and 16 MB,
provisions have been made in this design for using those devices if necessary, with
minimal required rework. U20 is programmed and powered from Vcc, there is no
additional 12 V programming voltage required for Strataflash devices. Support is
provided, in the form of bus transceivers and daughter card connector (U4, 5, 10, 28, 29,
and P4), for a single PCMCIA slot. The timing and control of the PCMCIA slot is
internal to the microprocessor. The hardware on both the 4004 and 4041 PCAs will
support all types of type I and type II PCMCIA cards, however the firmware will only
support ATA Flash Memory PC-Cards.
Serial Devices
The 268XA controller supports several serial device types, 10/100 Base T Ethernet,
RS-232 and multiple SPI devices. These peripherals are described on page 3 of the 1004
schematic.
The Ethernet functionality is split between the physical layer transceiver (PHY) and the
microprocessor, which houses the MAC layer and various application layers. The
interface between the 2 devices is an industry standard MII port. The PHY device (U17),
an AMD 79C874, autonegotiates the Ethernet link speed to either 10 Base Tx or 100
Base Tx, as well as either half or full duplex, depending on the capabilities of the hub that
it is talking with. This is transparent to both the firmware and the user. The PHY will
attempt to use the fastest mode, full duplex 100 Base Tx, as default and negotiate down in
capability if necessary. The LED labeled LNK on the rear panel of the 268XA chassis is
a link/speed indicator. It will be green if in 100 Base T mode or red if in 10 Base T mode.
There is no duplex or collision indication LED.
There are 2 RS-232 ports on the 268XA controller board. One of them is user accessible
from the rear panel at connector P1, and the other (P5) is for development and debug
only. P1 is an industry standard Male DB9 connector. The modem control signals RTS,
DTR, CTS and DSR are available for use from P1. P5 is a 3 pin mate-n-lok type
connector and requires a special cable assembly in order to use. The MAC address, serial
number, IP address and other sensitive boot configuration information may be changed
from this port. Great care should be used when accessing the 268XA through the P5
RS-232 console port.
The SPI devices in the 268XA system are the display controller on the 45-3201 PCA, and
one 2KBit EEPROM per module slot for calibration. These devices all share a common 3
wire synchronous interface, with only one device occupying the SPI bus at any given
time. The microprocessor is always the master, and addresses each SPI device
independently with a dedicated chip select. The calibration EEPROMs reside on the
module power supply PCA (268XA-4031) within each module, see section 5 below for
details.
Trigger In/Out, Master Alarm
The trigger in and trigger out functionality is shared by the microprocessor and the fpga.
The master alarm output, which is set by the firmware for as long as an alarm condition
occurs, is an inverted and protected version of a general purpose microprocessor port pin.
The MPC855 writes to a specific address in the gate array when a trigger out pulse is
required. The fpga then drives an output pin low and starts a timer for the requisite
125
µ
s pulse. The trigger input to the microprocessor is a buffered version of the trigger
input from the external world. This is necessary because the microprocessor only has
falling edge interrupts, and it needs to be interrupted on both edges of the trigger input
signal. So, when the trigger input goes low, the microprocessor tells the fpga to invert the
signal that it sees so that when the global trigger in signal goes high, the microprocessor
will see another falling edge interrupt, as required.
Содержание 2680A
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