pSOS SOFTWARE DEVELOPMENT
4-2
CPCI-810 User’s Manual
Revision 1.1, June 2001
Figure 4-1. Embedded Utilities Memory Block
4.3
ENDIAN CONSIDERATIONS
The MPC8240 on the CPCI-810 stores data in local memory in a big endian manner (most significant
byte in the lowest memory address). However, the PCI bus is a little endian bus (least significant byte
in the lowest byte lane), including access to all registers in the EUMB. Care must be taken to byte swap
data transferred from memory to the PCI bus or EUMB registers.
pSOS provides the following functions to read and write data to/from the PCI bus and EUMB. They
perform all required byte swapping. The following function declarations are from pci/pcihdr.h:
void PciWrite32(ULONG addr, ULONG value);
void PciWrite16(ULONG addr, ULONG value);
void PciWrite8 (ULONG addr, ULONG value);
ULONG PciRead32(ULONG addr);
ULONG PciRead16(ULONG addr);
ULONG PciRead8(ULONG addr);
4.4
PCI CONFIGURATION
The CPCI-810 is a CompactPCI system controller, responsible for the configuration of all PCI devices
in the system. This includes PCI initialization of the two 82559 Ethernet devices and PMC module
devices resident on PCI bus 0, and all other CPCI devices resident behins the 21154 PCI-to-PCI bridge
on the CompactPCI bus (bus 1).
0x0 0000
0x0 1000
0x0 2000
0x0 3000
0x0 4000
0x4 0000
0x8 0000
0xF FFFF
Message Unit
DMA
ATU
I
2
C
EPIC
Shaded area indicates locations not
allowed for the EUMB
StockCheck.com
