CPCI-810 User’s Manual
4-1
Revision 1.1, June 2001
CHAPTER 4
pSOS SOFTWARE DEVELOPMENT
4.1
INTRODUCTION
This chapter is dedicated to aiding pSOS application development using the Cyclone CPCI-810 pSOS
BSP. It contains information specific to the Cyclone BSP, and is intended to be used in conjunction
with the pSOS documentation provided by ISI / Wind River Systems. Note that there are many items
within the BSP that a user may want to self configure, so users should be readily able to modify and
rebuild the BSP when necessary.
Once an application has been built and linked with the CPCI-810 BSP, the image can be downloaded to
DRAM via Ethernet using the Cyclone TFTP Bootloader (see documentation on this procedure), or
downloaded to Flash ROM or DRAM using a JTAG-emulator such as Wind River’s Visionprobe tool
(see section 3.10).
This chapter is divided into the following sections:
•
Embedded Utilities Memory Block
•
Endian Considerations
•
PCI Configuration
•
EPIC Interrupt Programming
•
LM75 Temperature Sensors
4.2
EMBEDDED UTILITIES MEMORY BLOCK
The Embedded Utilities Memory Block (EUMB) is a relocatable memory block that contains the
registers for several of the MPC8240’s embedded features, including the Messaging Unit, DMA
Controller, Address Translation Unit (ATU), I
2
C Controller, and Embedded Programmable Interrupt
Controller (EPIC). Figure 4-1 shows the EUMB memory offsets for each of these embedded devices.
The base of the EUMB is software programmable by setting the EUMB Base Address Register
(EUMBBAR) in the MPC8240’s PCI Configuration Space (offset 0x78). pSOS initialization sets this
value at startup. Users should never modify this value, and should read this value when necessary using
a local PCI configuration read cycle (see section 4.4).
For further information on MPC8240 address maps and the EUMB, consult chapter 4 of the MPC8240
User’s Manual.
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