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CPCI-810 User’s Manual

B-1

Revision 1.1, June 2001

APPENDIX B

CPCI J2 DEFINITION

B.1

INTRODUCTION

The CPCI-810 utilizes some of the reserved pins in J2 for FAN and Power Supply status information.
Differences from the CPCI specification are shown in table B-1.

Table B-1. CPCI-810 J2 Definition

FAN1

FAN0

DET1#

FAL1#

GND

DET0#

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Содержание COMPACTPCI-810

Страница 1: ...any products herein to improve reliability function or design Cyclone Microsystems Inc neither assumes any liability arising out of the application or use of any product or circuit described herein no...

Страница 2: ...ER 3 3 1 SDRAM 3 1 3 1 1 Upgrading SDRAM 3 1 3 1 2 SDRAM Configurations Installation and Removal of Memory Modules 3 1 3 2 FLASH ROM 3 2 3 3 CONSOLE SERIAL PORT 3 2 3 4 COUNTER TIMERS 3 3 3 5 POWER SU...

Страница 3: ...4 PCI CONFIGURATION 4 2 4 4 1 pSOS PCI Device Driver Interface 4 3 4 5 EPIC INTERRUPT PROGRAMMING 4 3 4 5 1 Connecting and Disconnecting Interrupt Handlers in pSOS 4 4 4 6 LM75 TEMPERATURE SENSORS 4...

Страница 4: ...ATUS REGISTER READ ONLY 3 4 Figure 3 3 FAN STATUS REGISTER READ ONLY 3 4 Figure 3 4 LED Register Bitmap FF20 0000H 3 5 Figure 3 5 MPC8240 Processor DMA Controller 3 6 Figure 3 6 COP Header 3 7 Figure...

Страница 5: ...nments 2 4 Table 2 4 Error Priorities 2 5 Table 3 1 Console Port Connector 3 2 Table 3 2 UART Register Addresses 3 2 Table 3 3 100BaseTx Connector 3 9 Table 3 4 I2 C Device Addresses 3 9 Table 4 1 CPC...

Страница 6: ...th a PMC Module The PMC Module location allows the CPCI 810 to be configured for custom applications Additionally the CPCI 810 contains two Intelligent 10 100BaseT Ethernet Controllers and can be used...

Страница 7: ...0 for different applications The PMC Module resides on the PCI bus of the MPC8240 and can be accessed by the MPC8240 or a host on the CompactPCI bus Devices on the PMC Module can DMA data into local m...

Страница 8: ...I Local Bus Specification revision 2 1 provides concurrent bus operation allows buffering for both read and write transactions and provides the arbitration for the CompactPCI bus devices The CPCI 810...

Страница 9: ...can be operated at ambient air temperature of 0 55 degrees Celsius as measure at the board Table 1 2 ENVIRONMENTAL SPECIFICATIONS Voltage Current Typical Current Maximum 3 3V 3 10 Amps 4 30 Amps 5V 0...

Страница 10: ...ICAL ENVIRONMENT Figure 1 2 Physical Configuration Figure 1 2 is a physical diagram of the CPCI 810 Adapter showing the location designators of jumpers connectors and ICs Refer to this figure when com...

Страница 11: ...1 Mt Prospect IL 60056 7641 800 879 4683 LM75 Digital Temperature Sensor and Thermal Watchdog National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 800 272 9959 CompactPCI Specif...

Страница 12: ...middle of the ROM device This positioning results in a break up of continuous memory space and approximately 50 reduction in usable space for boot code To better utilize this device the CPCI 810 re ma...

Страница 13: ...pace PCI Memory Space Reserved DRAM FF40 0000h FF50 0000h FEF0 0000 FEC0 0000 FEE0 0000 4000 0000 FFFF FFFF FFE0 0000 FF00 0000 FE00 0000 FF30 0000h FF10 0000h 8000 0000 FF20 0000h FF60 0000h 0000 000...

Страница 14: ...the MPC8240 cause exceptions to be taken by the processor core The error reporting is provided for three of the primary interfaces processor core interface memory interface and the PCI interface Tabl...

Страница 15: ...software Please refer to the Motorola MPC8240 User s manual for more detail Global EPIC Registers Provides programming control for resetting configuration and initial ization of the external interrupt...

Страница 16: ...PCI received target abort errors Table 2 4 describes the relative priorities and recoverablity of externally generated errors and exceptions Table 2 4 Error Priorities Priority Exception Cause 0 Hard...

Страница 17: ...e expanded by inserting an additional 16 Mbyte to 128 MByte module into the 144 pin SoDIMM socket Only 144 pin 3 3V SDRAM modules with or without ECC rated for 100 MHz operation should be used on the...

Страница 18: ...is based on a 16C550 UART clocked at 1 843 MHz The device may be programmed to use this clock with the internal baud rate counters The serial port is capable of operating at speeds from 300 to 115200...

Страница 19: ...ocessor interrupt mechanism 3 5 POWER SUPPLY MONITORING Two circuits are provided for monitoring the health of power supplies Additional inputs to the CompactPCI connector define pins for degraded fai...

Страница 20: ...dix B for their pin locations The fan monitoring circuits will provide an interrupt to the processor if the frequency of the fan output falls below approximately 8K RPM Green LEDs are provided for fan...

Страница 21: ...bridge The secondary side of the 21154 interfaces a 32 bit PCI bus to the MPC8240 with the PMC module and the two ethernet ports 3 8 1 Primary PCI Arbitration The primary PCI bus arbitration is provid...

Страница 22: ...s Data movement occurs on the PCI and or memory bus Each channel has a 64 byte queue to facilitate the gathering and sending of data Both the local processor and PCI masters can initiate a DMA transfe...

Страница 23: ...mon on chip processor COP function of PowerPC processors The COP function of PowerPC processors allows a remote computer system typically a PC with dedicated hardware and debugging software to access...

Страница 24: ...r interface PHY The integrated PHY supports 10BaseT and 100BaseTx operation The PHY performs digitally controlled receive line equalization and transmit waveform generation for 10Mbps and 100Mbps ethe...

Страница 25: ...able 3 3 100BaseTx Connector 3 11 I2 C BUS The CPCI 810 has three components attached to the Inter Integrated Circuit I2C bus interface of the MPC8240 processor the SoDIMM SDRAM EEPROM and two tempera...

Страница 26: ...ms 500ms or 1s The watchdog must be enabled to function and can be disabled at any time A watchdog keep alive must take place before the time out period is reached Failure to do so will result in a re...

Страница 27: ...er is divided into the following sections Embedded Utilities Memory Block Endian Considerations PCI Configuration EPIC Interrupt Programming LM75 Temperature Sensors 4 2 EMBEDDED UTILITIES MEMORY BLOC...

Страница 28: ...required byte swapping The following function declarations are from pci pcihdr h void PciWrite32 ULONG addr ULONG value void PciWrite16 ULONG addr ULONG value void PciWrite8 ULONG addr ULONG value UL...

Страница 29: ...arguments Others such as those that access a particular PCI device require the PCI_LOC element from the list which indicates which device the transaction is to occur on typedef struct pciloc short bus...

Страница 30: ...NT NUMBER INT VECTOR SOURCE PRIORITY LEVEL DESCRIPTION 0 0x10 PINTA 8 INTA on PCI Bus 1 0x11 PINTB 8 INTB on PCI Bus 2 0x12 PINTC 8 INTC on PCI Bus 3 0x13 PINTD 8 INTD on PCI Bus 4 0x14 PMCINTA 6 INTA...

Страница 31: ...utines that simplify the use of the devices Included are functions to read and write to registers on the LM75 including the temperature trip and hysteresis registers Before use the LM75 should be plac...

Страница 32: ...modules A 2 PHYSICAL ATTRIBUTES Please refer to IEEE P1386 Draft 2 0 for the physical dimensions of PMC modules A 3 PMC MODULE SIGNAL DEFINITIONS PMC Modules use the signals defined in the IEEE STD P...

Страница 33: ...Draft 2 0 for dimensions and component clearance details Table A 3 P21 PMC Module Connector Pinout DEVICE INTx 1ST DEVICE 2ND DEVICE INTA INTA INTD INTB INTB INTA INTC INTC INTB INTD INTD INTC Pin Sig...

Страница 34: ...Signal 1 12V 2 TRST 3 TMS 4 TDO 5 TDI 6 GND 7 GND 8 PCI RSVD 9 PCI RSVD 10 PCI RSVD 11 BUSMODE2 12 3 3V 13 RST 14 BUSMODE3 15 3 3V 16 BUSMODE4 17 PCI RSVD 18 GND 19 AD30 20 AD29 21 GND 22 AD26 23 AD2...

Страница 35: ...ULE INTERFACE A 4 CPCI 810 User s Manual Revision 1 1 June 2001 53 3 3V 54 PMC CLK1 55 PMC GNT1 56 GND 57 PMC RSVD 58 PMC RSVD 59 GND 60 PMC RSVD 61 ACK64 62 3 3V 63 GND 64 PMC RSVD S t o c k C h e c...

Страница 36: ...1 INTRODUCTION The CPCI 810 utilizes some of the reserved pins in J2 for FAN and Power Supply status information Differences from the CPCI specification are shown in table B 1 Table B 1 CPCI 810 J2 D...

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