SLM-3650 Satellite Modem
Revision 3
Theory of Operation
MN/SLM3650.IOM
4–22
4.5.1.2 EIA-422/EIA-449 Specifications
Refer to Table 4-5 for EIA-422/EIA-449 specifications.
Table 4-5. EIA-422/EIA-449 Specifications
Parameter
Specification
Circuit Supported
SD, ST, TT, RD, RT, DM, RR, RS, CS, MC
Amplitude (RD, RT, ST, DM, RR)
± 2V differential into 100
Ω
Impedance (RD, RT, ST, DM, RR)
Less than 100
Ω
, differential
Impedance (SD, TT, MC)
4k
Ω
True when B positive with respect to A
False when A positive with respect to B
Phasing (RD, RT)
False-to-true transition of RT nominally in center of RD data bit
Symmetry (ST, TT, RT)
50% ± 5%
4.5.1.3 V.35
Specifications
Refer to Table 4-6 for V.35 specifications.
Table 4-6. V.35 Specifications
Parameter
Specification
Circuit Supported
SD, SCT, SCTE, RD, SCR, DSR, RLSD, RTS, CTS, MC
Amplitude (RD, SCR, SCT, SD, SCTE)
± 55V-pk ± 20% differential, into 100
Ω
Amplitude (CTS, DSR, RLSD)
±10 ± 5V into ± 5000 ± 2000
Ω
Impedance (RD, SCR, SCT)
100, ± 255 > 20
Ω
, differential
Impedance (SD, SCTE)
100, ± 10
Ω
, differential
Impedance (RTS)
5000, ± 2000
Ω
, < 2500 pF
DC Offset (RD, SCR, SCT)
± 0.6V maximum, 1000
Ω
termination to ground
Polarity (SD, SCT, SCTE, RD, SCR)
True when B positive with respect to A
False when A positive with respect to B
Polarity (RTS, CTS, DSR, RLSD)
True when < -3V with respect to ground
False when > +3V with respect to ground
Phasing (SCTE, SCR)
False-to-True transition nominally in center of data bit
Symmetry (SCT, SCTE, SCR)
50%, ± 5%
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