AT91CAP9A-DK Development Kit User Guide
3-23
6321B–CAP–02-Jul-07
3.14.4
USB Device interfaces
The three USB device interfaces are connected to the FPGA of the AT91CAP9A-DKZ mezzanine. Each
of them includes an ISP1501 PHY (MN4, 5, 6). These are attached to USB Type-B connectors with on-
board manual jumper selection (J11, 13, 15). This selection makes a pull-up connection to be applied
either to D+ or D- and thereby selects the communication speed standard (low speed or full speed).
Warning: Some of these FPGA IOs are shared with extension connectors. Refer to
165
B3
IO
F25
FPGA267
166
GND
167
B3
IO
G22
FPGA268
168
B3
IO
G23
FPGA269
169
GND
170
B3
IO
H23
FPGA270
171
B3
IO
J23
FPGA271
172
VCCIO3
173
B3
IO
L22
FPGA272
174
B3
IO
F24
FPGA273
175
GND
176
B3
IO
G24
FPGA274
177
B3
IO
H24
FPGA275
178
GND
181
GND
184
GND
Table 3-4. PCI64 Extension Connector Table (Continued)
J9 Pin
FPGA
Bank
FPGA Pin
Function
Other FPGA Pin Information
FPGA Ball
Board Net
Table 3-5. USB Interface and FPGA Connection
FPGA
Bank
FPGA
Ball
Board Signal
Board
Component
Pin
Function
B3
E24
FPGA246
R12
2
VBUS detection
B3
C25
FPGA247
MN4
1
/OE
B3
E27
FPGA248
MN4
5
SUSPEND
B1
U30
FPGA2
MN4
2
RCV
B1
U29
FPGA3
MN4
4
VM
B1
AJ29
FPGA94
MN4
3
VP
B3
A27
FPGA253
MN4
12
VMO/FSEO
B3
A28
FPGA254
MN4
11
VPO/VO
B3
D27
FPGA255
MN4
16
SOFTCON
B3
B28
FPGA256
R21
2
VBUS detection
Содержание AT91CAP9
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