7-60
AT91CAP9A-DK Development Kit User Guide
6321B–CAP–02-Jul-07
B1
IO
DIFFIO_TX21n
Y26
FPGA35
B1
IO
DIFFIO_RX20p
AC32
FPGA36
B1
IO
DIFFIO_RX20n
AC31
FPGA37
B1
IO
DIFFIO_TX20p
AA27
FPGA38
B1
IO
DIFFIO_TX20n
AA26
FPGA39
B1
IO
DIFFIO_RX28p
V31
FPGA4
B1
IO
DIFFIO_RX19p
AB28
FPGA40
B1
IO
DIFFIO_RX19n
AB27
FPGA41
B1
IO
DIFFIO_TX19p
Y25
FPGA42
B1
IO
DIFFIO_TX19n
Y24
FPGA43
B1
IO
DIFFIO_RX18p
AD32
FPGA44
B1
IO
DIFFIO_RX18n
AD31
FPGA45
B1
IO
DIFFIO_TX18p
W23
FPGA46
B1
IO
DIFFIO_TX18n
W22
FPGA47
B1
IO
DIFFIO_RX17p
AE32
FPGA48
B1
IO
DIFFIO_RX17n
AE31
FPGA49
B1
IO
DIFFIO_RX28n
V30
FPGA5
B1
IO
DIFFIO_TX17p
AD27
FPGA50
B1
IO
DIFFIO_TX17n
AD26
FPGA51
B1
IO
DIFFIO_RX16p
AF32
FPGA52
B1
IO
DIFFIO_RX16n
AF31
FPGA53
B1
IO
DIFFIO_TX16p
AC27
FPGA54
B1
IO
DIFFIO_TX16n
AC26
FPGA55
B1
IO
DIFFIO_RX15p
AG32
FPGA56
B1
IO
DIFFIO_RX15n
AG31
FPGA57
B1
IO
DIFFIO_TX15p
Y23
FPGA58
B1
IO
DIFFIO_TX15n
Y22
FPGA59
B1
IO
DIFFIO_TX28p
U23
FPGA6
B1
IO
DIFFIO_RX14p
AC30
FPGA60
B1
IO
DIFFIO_RX14n
AC29
FPGA61
B1
IO
DIFFIO_TX14p
AA25
FPGA62
B1
IO
DIFFIO_TX14n
AA24
FPGA63
B1
IO
DIFFIO_RX13p
AD30
FPGA64
B1
IO
DIFFIO_RX13n
AD29
FPGA65
B1
IO
DIFFIO_TX13p
AB26
FPGA66
B1
IO
DIFFIO_TX13n
AB25
FPGA67
Table 7-6. FPGA Pins Sorted by Signal Name (Continued)
Bank
Pin Type Name
Other Pin Information
Configuration
Function
Ball
Board Net
Содержание AT91CAP9
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