Artesyn BajaPPC-750, Руководство пользователя

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Real-Time Clock 4-7
0002M621-15
The Real-Time Clock Configuration Registers contain all of the clock/calendar
data and calibration information. Under normal operating conditions, the
M48T35 operates as a conventional byte-wide static RAM. If the supply voltage
drops below the V
PFD
(min) threshold, the device automatically protects itself by
taking all outputs to high impedance and treating all inputs as “don’t care.” The
control circuit switches power to the internal battery to preserve the data. The
battery will operate for an accumulated period of at least 7 years.
The following descriptions apply to the bits shown in Register Map 4-3:
FT Frequency Test Bit - This bit is automatically reset to zero upon power-up
and must be zero for normal clock operation. The FT bit is used in cali-
brating the clock (refer to M48T35 data sheet for calibration methods).
ST Stop Bit - Writing a one to this bit turns off the oscillator. If the M48T35
will be stored for a significant amount of time, stopping the oscillator
minimizes current drain on the battery.
W Write Bit - Writing a one to this bit halts the register updating so that the
day, date, and time BCD data may be written. When the write bit is set
back to zero, the written data is transferred to the counters and the regis-
ter updating resumes. Note: The FT bit and ‘0’ bits must be written to
zero for normal clock and RAM operation.
R Read Bit - Writing a one to this bit halts the register updating so that the
day, date, and time information may be read. When the read bit is set
back to zero, the register updating resumes.
S Sign Bit - This bit is used in calibrating the clock. A one indicates positive
calibration, while a zero indicates negative calibration (see M48T35 data
sheet for details).
0 These bits must be set to zero for proper operation of the real-time clock.