Artesyn BajaPPC-750, Руководство пользователя

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8-2 BajaPPC-750: Serial and Parallel I/O
May 2002
8.1.1 Basic Operation
The W83C553 is an integrated device that bridges the PCI and ISA busses and
performs PCI arbitration. In addition, it has other features (such as common ISA
I/O functions) which are unimplemented for the BajaPPC-750.
In its basic operation, the W83C553 translates cycles from the PCI bus onto the
ISA bus, performing as a standard ISA bus controller with data buffering logic.
The W83C553 generates ISA commands, controls I/O recovery, inserts wait-states,
and supports up to five ISA slots without external buffering circuitry. An arbiter
resolves any conflicts between PCI, refresh, and DMA cycles. The W83C553 han-
dles both PCI master and slave bus bridging.
8.1.2 Registers
The following table briefly summarizes the ISA bridge registers. Please refer to the
Winbond Systems
W83C553F System I/O Controller with PCI Arbiter Data Book for
the bit assignments and other important details.
Table 8-2. W83C553 Internal Register Summary
Hex Offset Type Name
Hex
Default
Header Registers
01-00 — Vendor ID 10AD
03-02 — Device ID 0565
05-04 R/W Command 0007
07-06 R/W Status 0200
08 — Revision ID 00
0B-09 — Class Code 060100
0E — Header Type 80
Control Registers (Function 0)
40 R/W PCI Control 20
41 R/W Scatter/Gather Relocation Base Address 04
42 R/W Line Buffer Control 00
43 R/W IDE Interrupt Routing Control EF
45-44 R/W PCI Interrupt Routing Control 0000
47-46 R/W BIOS Timer Base Address 0078
48 R/W ISA-to-PCI Address Decoder Control 01
49 R/W ISA ROM Address Decode 00
4A R/W ISA-to-PCI Memory Hole Start Address 00
4B R/W ISA-to-PCI Memory Hole Size 00
4C R/W Clock Divisor 00
4D R/W Chip Select Control 33