Artesyn BajaPPC-750, Руководство пользователя

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Mailboxes 6-23
0002M621-15
Two interrupt mapping registers, LINT_MAP2 at offset 340
16
and VINT_MAP2 at
offset 344
16
, define the mailbox interrupt destinations. For example, writing a
value of 000
2
to LINT_MAP2, bits [2:0], maps the corresponding interrupt source
for mailbox 0 to LINT[0]; writing a value of 001
2
to the same location maps the
source to LINT[1]; writing 010
2
maps to LINT[2], and so on. Similarly, writing a
value of 001
2
to VINT_MAP2, bits [2:0], maps the corresponding interrupt source
for mailbox 0 to VIRQ1; writing a value of 010
2
to the same location maps the
source to VIRQ2; writing 011
2
maps to VIRQ3, and so on.
Two status registers, LINT_STAT at offset 304
16
and VINT_STAT at offset 314
16
,
may be read to determine if a specific mailbox interrupt is active (1=active,
0=inactive). Writing a one clears the status bit.
Two access registers, VRAI_BS at offset F74
16
and VRAI_CTL at offset F80
16
, make
the mailboxes available on the VMEbus. The VMEbus Register Access Image Base
Address Register, VRAI_BS, specifies the base address in bits BS[31:12]. The VME-
bus Register Access Image Control Register, VRAI_CTL, is described as follows:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
EN Reserved PGM SUPER Reserved VAS
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
Register Map 6-9. Universe VMEbus Register Access Image Control, VRAI_CTL
EN Enable the image.
Binary 0=disabled, 1=enabled.
PGM Program/data AM code.
Binary 00=reserved, 01=data, 10=program, 11=both.
SUPER Supervisor/user AM code.
Binary 00=reserved, 01=non-privileged, 10=supervisor, 11=both.
VAS VMEbus address space.
Binary 000=A16, 001=A24, 010=A32, all others=reserved.