AT32F425
Series Reference Manual
2022.03.30
Page 426
Ver 2.01
PID [31: 0]
AT32 part number
FLASH size
Packages
0x5009_2100
AT32F425R8T7
64KB
64LQFP (10 x10)
0x5009_2081
AT32F425R6T7
32KB
64LQFP (10 x10)
0x5009_2103
AT32F425R8T7-7
64KB
64LQFP (7 x 7)
0x5009_2084
AT32F425R6T7-7
32KB
64LQFP (7 x 7)
0x5009_2106
AT32F425C8T7
64KB
48LQFP
0x5009_2087
AT32F425C6T7
32KB
48LQFP
0x5009_2109
AT32F425C8U7
64KB
48QFN
0x5009_208A
AT32F425C6U7
32KB
48QFN
0x5009_210C
AT32F425K8T7
64KB
32LQFP
0x5009_208D
AT32F425K6T7
32KB
32LQFP
0x5009_210F
AT32F425K8U7-4
64KB
32QFN
0x5009_2090
AT32F425K6U7-4
32KB
32QFN
0x5009_2112
AT32F425F8P7
64KB
20TSSOP
0x5009_2093
AT32F425F6P7
32KB
20TSSOP
23.4.2 DEBUG control register (DEBUG_CTRL)
This register is asynchronously reset by POR Reset (not reset by system reset). It can be written by the
debugger under reset.
Bit
Register
Reset value Type Description
Bit 31:28
Reserved
0x0000 0000 resd Always 0.
Bit 27
TMR14_PAUSE
0
rw
TMR14 debug control bit
0: TMR14 runs normally
1: TMR14 stops running
Bit 26
TMR13_PAUSE
0
rw
TMR13 debug control bit
0: TMR13 runs normally
1: TMR13 stops running
Bit 25
Reserved
0x0
resd Always 0.
Bit 24
TMR17_PAUSE
0
rw
TMR17 debug control bit
0: TMR17 runs normally
1: TMR17 stops running
Bit 23
TMR16_PAUSE
0
rw
TMR16 debug control bit
0: TMR16 runs normally
1: TMR16 stops running
Bit 22
TMR15_PAUSE
0
rw
TMR15 debug control bit
0: TMR15 runs normally
1: TMR15 stops running
Bit 21
ERTC_512_PAUSE
0
rw
ERTC 512Hz output clock pause control bit
0: ERTC 512Hz output clock works normally
1: Froze 512Hz output clock
Bit 20
TMR7_PAUSE
0
rw
TMR7 debug control bit
0: TMR7 runs normally
1: TMR7 stops running
Bit 19
TMR6_PAUSE
0
rw
TMR6 debug control bit
0: TMR6 runs normally
1: TMR6 stops running
Bit 18: 17 Reserved
0x0000 0000 resd Always 0.
Bit 16
I2C2_SMBUS_TIMEOUT 0
rw
I2C2 pause control bit
0: I2C2 SMBUS timeout control works normally
1: I2C2 SMBUS timeout control stops running
Bit 15
I2C1_SMBUS_TIMEOUT 0
rw
I2C1 pause control bit
0: I2C1 SMBUS timeout control works normally
1: I2C1 SMBUS timeout control stops running
Bit 14
ERTC_PAUSE
0
rw
ERTC pause control bit
0
:
ERTC works normally
1
:
ERTC stops running
Bit 13
Reserved
0x0
resd Always 0.
Bit 12
TMR3_PAUSE
0
rw
TMR3 debug control bit
0: TMR3 runs normally