Instruction Cycle Timings
6-28
Copyright © 2001, 2004 ARM Limited. All rights reserved.
ARM DDI 0210C
6.19
Unexecuted instructions
Any instruction whose condition code is not met does not execute and adds one cycle
to the execution time of the code segment in which it is embedded (see Table 6-22).
Table 6-22 Unexecuted instruction cycle operations
Cycle
Address
MAS[1:0]
nRW
Data
nMREQ
SEQ
nOPC
1
pc+2L
i
0
(pc+2L)
0
1
0
pc+3L
Содержание ARM7TDMI
Страница 6: ...Contents vi Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Страница 10: ...List of Tables x Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Страница 14: ...List of Figures xiv Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Страница 46: ...Introduction 1 26 Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Страница 120: ...Coprocessor Interface 4 18 Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Страница 142: ...Debug Interface 5 22 Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Страница 276: ...Differences Between Rev 3a and Rev 4 C 6 Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Страница 282: ...Glossary Glossary 6 Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...