Super Voyager LPX ISA Motherboard User's Guide
Power Management Setup,
Continued
Stop Clock Mode
When this option is set to
Enabled,
the CPU stop clock is programmed
through the
system event timer.
The settings are
Enabled
or
Disabled.
The Optimal and Fail-Safe default settings are
Disabled.
This option is only supported if an S-Series Intel CPU is installed on the
motherboard.
System Event Timer
When this option is set to
Disabled,
the CPU stop clock is not generated
to the CPU. Otherwise, the selected length of time specifies the period of
system inactivity that must expire before the stop clock signal is
generated. The following events reset this timer:
• any activity in the C0000h - C7FFFh video BIOS,
• any activity in A0000h - BFFFFh video memory,
• any I/O activity in I/O ports addresses 0001h - 3FFFh,
• any DMA activity,
• an LBM (local bus master) signal on the VL-Bus,
• IRQ 3, 4, 5, 7, 9, 10, 11, 12, or 15 activity (if the
Timer Reset by
IRQ
option is set to
Enabled)
,
The
Stop Clock Mode
option must be set to
Enabled
before this option
can be set to any setting from
1 Min
through
15 Min.
The settings are
Disabled, 1 Min, 2 Min, 3 Min, 4 Min, 5 Min, 6 Min, 7
Min, 8 Min, 9 Min, 10 Min, 11 Min, 12 Min, 13 Min, 14 Min,
or
15 Min.
The Optimal and Fail-Safe default settings are
Disabled.
This option is only supported if an S-Series Intel CPU is installed on the
motherboard.
Содержание Super Voyager LPX
Страница 22: ...Super Voyager LPX ISA Motherboard User s Guide...
Страница 48: ...Chapter 2 Installation 42 Step 5 Install the Motherboard Continued...
Страница 67: ...Super Voyager LPX ISA Motherboard User s Guide...
Страница 172: ...Chapter 6 AMIBIOS Setup 166...
Страница 174: ...Chapter 6 AMIBIOS Setup 168...
Страница 178: ...Chapter 6 AMIBIOS Setup 172...
Страница 180: ...Chapter 6 AMIBIOS Setup 174...
Страница 190: ...Appendix A Upgrading Cache Memory 184...
Страница 200: ...Index 194...