7451A/7461A/7461P Digital Multimeter Operation Manual
6.7.5 Status Register Structure
6-49
This register responds to the serial polling from the controller. When the register responds to the serial
polling, bit0 to bit5, bit7, and the RQS of the status byte register are read, and then the RQS is reset
to 0. No other bits are cleared until each factor is set to 0.
The status byte register, RQS, and MSS can be cleared by executing “*CLS”. Consequently, the SRQ
line is set to FALSE.
A description of each bit in the status byte register is shown in Table 6-7.
Table 6-7 Status Byte Register (STB)
bit
Name
Description
0
MSB
Measurement Sum-
mary Bit
ON: When any event of Measurement Event Register occurs and Measurement
Event Register is set to 1, this bit is set to 1 if the corresponding bit of the
Measurement Event Enable Register is set to 1.
OFF: This bit is set to 0 when Measurement Event Register is cleared by being
read.
1
Not used
Always 0
2
EAV
Error Available
ON: This bit is set to 1 when the error information is stored in Error Queue.
OFF: This bit is set to 0 when the error information is read from Error Queue and
no data has existed in Error Queue.
3
QSB
Questionable Sum-
mary Bit
ON: When any event of Questionable Event Register occurs and Questionable
Event Register is set to 1, this bit is set to 1 if the corresponding bit of the
Questionable Event Enable Register is set to 1.
OFF: This bit is set to 0 when Questionable Event Register is cleared by being
read.
4
MAV
Message Available
ON: This bit is set to 1 when the output data is entered in the output buffer.
OFF: This bit is set to 0 when the data is read from the output buffer.
5
ESB
Standard Event Status
ON: When any event of SESR occurs and SESR is set to 1, this bit is set to 1 if
the corresponding bit of the SESER is set to 1.
OFF: This bit is set to 0 when SESR is cleared by being read (*ESR?).
6
MSS
Master Summary
ON: When any event of STB occurs, this bit is set to 1 if the corresponding bit of
the SRER is set to 1.
RQS
Request Service
ON: If MSS is set to 1, SRQ is generated and RQS is set to 1.
OFF: When STB is read in the serial polling, RQS is set to 0.
7
OSB
Operation Summary
Bit
ON: When any event of Operation Event Register occurs and Operation Event
Register is set to 1, this bit is set to 1 if the corresponding bit of the Opera-
tion Event Enable Register is set to 1.
OFF: This bit is set to 0 when Operation Event Register is cleared by being read.
