PV152
2-24
PRO1200 CIRCUIT DESCRIPTION
CIRCUIT DESCRIPTION
Contrast, brightness and gain adjustments
Contrast / Gain
(Page 6-53 Sect. C-4&5)
The general (common) contrast and the individual gain
controls are first combined with the (optional) contrast
modulation waveforms and as such used in a multiplier
(a variable gain amplifier) to adjust the amplitudes.
The contrast voltage is generated by the IC3
VO0
output
and ranges from +1V (minimum) to +3V (maximum). The
multiplier requires just the opposite, hence, the con-
trast voltage is inverted by IC5 (8,9,10). R54 and D8
prevent this contrast voltage from exc3V as this
would mean that the multiplier inverts the polarity of
the videosignal.
This contrast voltage is now three times multiplied with
the gain control of each color. This is realized by using
the contrast voltage as the
VRP3, VRP2
and
VRP1
supply
for the potentiometers
1, 2
and
3
of the Bella IC3. The
other end of the potentiometers
(VRN*)
is connected
to the +3V, or the minimum contrast.
The outputs
VO1,2,3
are the result of the general con-
trast and the individual gain controls.
The output range of the Bella’s is not what is needed by
the multipliers. Therefor the OPAMP’s / inverters in IC4
adapt the range to 0.05V <—> 1.19V which is the needed
range of the multipliers.
BCL / IBCL / Drive modes
(Page 6-53 Sect. D&E-3, A8)
The contrast voltage can be reduced by the
BCL
and
IBCL
informations. The negative
BCL
voltage from the
EHT board drives Q2 on from the -0.6V level onwards.
This will turn on Q1. The
INT
ernal
CONTRAST
voltage or
the
BCL_LINK
voltage cannot further increase.
The
IBCL
voltages are slightly smoothed and compared
to an adjustable voltage
(IBCL_VALUE)
from the poten-
tiometer
“0”
of IC2. This value depends on the Eco /
Normal / Boost mode drive, set by software.
As soon an
IBCL_*
voltage reaches the
IBCL_VALUE
the
corresponding comparator drops the contrast through
one or more of the conducting diodes D4, D5, D6.
ABL trigger generator.
The ABL circuits of the RGB video amplifiers are trig-
gered by a pulse of 20 µS and an amplitude of 12V. This
pulse is added to the
IBCL
lines as these lines are not
carrying any valid information during this time. The
ABL
pulse is here ac coupled to the lines through C19, C20
and C21.
As the ABL trigger pulse is generated on the
UN SYNC+
VERT DEFL
board and superposed on the
V BL
(has an
amplitude from 17V - 34V), the
V BL
is dropped by 20V
with Z3 and Q3 will conduct during this
V BL
pulse time.
The differentiator C18/R70 drives Q4 into conduction
for 20µS and via R73/C19, C20, C21 they are AC coupled
into the IBCL lines.
Brightness / Black Level.
Introduction.
The brightness control is nearly identical to the con-
trast. The general brightness is combined with the indi-
vidual
BLACK_LEVEL_*
and the resulting
OUTPUT_DC_*
voltage is an offset of the reference black level of +2V.
At 50% brightness setting, the black level of the output
signal of the
RGB DRIVE
board must be clamped at +2V.
This condition is translated into a 2V output for the
potentiometers
VO1, VO2, VO3
of IC1
and
IC2. Only then,
there is no current flow in R7, R8, R9, R10, R11 and
R12. The +2V
OUTPUT_DC
is now the same as the refer-
ence voltage of the inverters/comparators IC205, IC305,
IC405.
Circuit Implementation.
As
VRN0
= +3V and
VRP0
= +1V the brightness voltage at
VO0
of IC1 changes from +3V (min. brightness) to
+1V(max. brightness). This brightness voltage is applied
again to the
VRP1,2,3
of three potentiometers in IC1.
The other end
VRN1,2,3
of these potentiometers is the
reference voltage
+2V.
These three potentiometers in IC1 obtain the same set-
tings of the gain controls in IC3.
If the brightness voltage is +2V (50%) the outputs
VO1,2,3
of IC1 are ALWAYS at +2V, irrelevant of the gain
setting.
Any change of the brightness and gain settings change
the output voltage(s). With above
“gain scaled bright-
ness voltages”
the black level is tracked with the gain
adjustment in order to not deteriorate the color tem-
perature with contrast.
We can add to these “gain scaled brightness voltages”
an extra offset via R10, R11, R12 to adjust the low lights.
Technical description Video Amplifier 809-10450
Video Amplifier
(Page 6-53 Sect. D-3)
The video signal arrives at pin 2 of J1 and is terminated
into 75W the resistors R1...6. The first half of IC2 switches
the base of Q2 between this video signal (no ABL-Auto-
matic Black Level) and the reference voltage on pin 1 of
IC10 (during ABL).
Via buffer Q1 and D3, the signal is fed to the input of a
non-inverting amplifier formed by Q2 and Q3. Diode D3
protects Q1 against high inverse Vbe voltage during
blanking. Resistors R13, R14 form, together with R15
and R104, a divider that limits the voltage at the emit-
ter of transistor Q1 during overdrive conditions of the
input. This prevents saturation of the amplifier.
