
PV152
2-26
PRO1200 CIRCUIT DESCRIPTION
CIRCUIT DESCRIPTION
R90, R91, R92 and P3 to 0V and compared with ground
by IC6 pins 1, 2 and 3. If the output voltage is too low,
pin 1 goes higher and more current is flowing through
Q15, Q13 and Q14 as to raise the output until steady
state. The transistor Q12 limits the peak current.
CIRCUIT DESCRIPTION “ D COMB FILTER “
809-10455
(Page 6-36)
General.
The decoder section of this board with comb filtering
uses decoder chips TDA4650 / TDA4665 / TDA 4565.
The implementation of the
adaptive digital comb filter
for
PAL and NTSC 3.58 (not for SECAM and NTSC 4.43) has
changed the input switching circuit and two ICs for the
digital comb filtering have been added. The first IC gen-
erates sync and sampling pulses. The second IC is per-
forming the adaptive digital comb filtering.
Filter Switching
(Page 6-36 Sect. F-3)
In decoder IC 11 the VID/ LUM input signal passes an
emitter follower in order to supply the provided filters.
Multistandard Decoder chip IC 11 sequentially checks
the information on the backporch of the horizontal sync.
When the right system is identified, the appropriate
output PAL/SECAM/NTSC4.43 or NTSC3.58 is put at a high
level. The filters for the Luma signal are an all pass, a
rejector at 4.43 MHz and a Luma Comb filter (via Q41).
The filters for the Chroma signal are a high Pass 2.5MHz,
a Chroma Comb filter (via Q40) and a SECAM BELL filter
(via Q10).
The switching outputs of TDA4650 are supplied to a GAL
(IC14), where the decoder mode will be recognized. The
programmed GAL IC14 takes care, using the two outputs
SwBit0 and SwBit1 as address inputs for the IC18, that
the correct signal on the 4-channel Analog Multi-/
Demultiplexer IC18 is switched through.
The filters are switched in the following way:
The two output signals of the 4-channel Analog Multi-/
Demultiplexer IC18 (Page 6-7 Sect. F6), respectively
Chr_Sw and Y_Sw, are the supply signals for the Decoder
IC’s.
Next, the composite video is split into luminance and
chrominance. This split depends on the color system.
For PAL and NTSC 3.58 this is done by an adaptive digi-
tal comb filter. For SECAM this is done by passive filter-
ing. For NTSC4, digital bandpass and band reject filters
are used.
The chrominance is applied to the decoder IC in order
to furnish the color difference signals -(R-Y) and -(B-Y).
These signals are then applied to the “baseband delay
line” IC to add the chroma information of two subse-
quent lines.
(With NTSC3.58, the digital comb filter has already done
a similar action, this delay line IC is bypassed for
NTSC3.58.)
The CTI IC is supplied with the color difference signals
and the luminance. The same CTI chip is also responsible
for the luminance delay in order to correct the phase
difference between the two signals due to the color de-
coding process.
Finally, the luminance passes a “sharpness control” and
the three signals leave the decoder via current sources.
Sync Processor CXA1686M
(Page 6-37 Sect. B-4)
The bloc schematic shows that the sync processor has
three inputs:
VID IN, C IN
and
Y IN.
There are two PLL’s in the IC. The first one generates a
stable
B
urst
G
ate
P
ulse. The second one generates a sam-
pling frequency of 4 x Fsc (4 times the color subcarrier)
required by the digital comb filter IC.
Note that the color subcarrier is 3.58Mhz in NTSC3 and
4.43Mhz in PAL. The required frequencies are conse-
quently:
For NTSC: 4 x 3.58Mhz = 14.318 Mhz ( VCO1 in the bloc
diagram)
For PAL : 4 x 4.43Mhz = 17.734 Mhz (VCO2 in the bloc
diagram).
In order to generate these stable frequencies the second
PLL is used. This PLL consists of an
APC
(Automatic
Phase Control), a
VCO
(Voltage Controlled Oscillator) and
a
divider
by 4
(1/4).
The
APC
receives the oscillator frequency divided by 4,
and, the burst which must be gated out of the chromi-
nance. Stable burst gate pulses “
BGP
” are generated by
the aid of the first PLL running at approximately 32 x Fh
(32 times the line frequency) or approx. 500khz.
The BGP pulses, besides internal use in the sync proces-
sor itself, are also used by the comb filter (pin 17).
The reference frequency for the first PLL is provided by
the ceramic filter KF100 connected at pin 5.
The video signal first passes a “
sync separator
“ which is
used in the IC itself to lock the first PLL (500khz).